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[libreriscv.git] / openpower / sv / bitmanip.mdwn

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index bf4add5cc00cb16b681f72b0ed616a1171b271df..56a39a6203f53d35ae1861002d396bea15d3e962 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -161,13 +161,13 @@ the [[sv/av_opcodes]])
 | NN | RS | RA  | sh  | SH | 00    | 1010 110 |Rc| rsvd      |   |
 | NN | RT | RA  | RB  | 0  | 00    | 0110 110 |Rc| rsvd      |   |
 | NN | RS | RA  | SH  | 0  | 00    | 1110 110 |Rc| rsvd      |   |
-| NN | RT | RA  | RB  | 1  | 00    | 1110 110 |Rc| rsvd      |         |
+| NN | RT | RA  | RB  | 1  | 00    | 1110 110 |Rc| absds     | X-Form   |
 | NN | RT | RA  | RB  | 0  | 01    | 0010 110 |Rc| rsvd      |   |
 | NN | RT | RA  | RB  | 1  | 01    | 0010 110 |Rc| clmulr    | X-Form  |
 | NN | RS | RA  | sh  | SH | 01    | 1010 110 |Rc| rsvd      |  |
 | NN | RT | RA  | RB  | 0  | 01    | 0110 110 |Rc| rsvd      |   |
 | NN | RS | RA  | SH  | 0  | 01    | 1110 110 |Rc| rsvd      |   |
-| NN | RT | RA  | RB  | 1  | 01    | 1110 110 |Rc| rsvd      |         |
+| NN | RT | RA  | RB  | 1  | 01    | 1110 110 |Rc| absdu     | X-Form  |
 | NN | RS | RA  | RB  | 0  | 10    | 0010 110 |Rc| bmator    | X-Form  |
 | NN | RS | RA  | RB  | 0  | 10    | 0110 110 |Rc| bmatand   | X-Form  |
 | NN | RS | RA  | RB  | 0  | 10    | 1010 110 |Rc| bmatxor   | X-Form  |
@@ -176,8 +176,8 @@ the [[sv/av_opcodes]])
 | NN | RT | RA  | RB  | 1  | 10    | 0110 110 |Rc| xpermb    | X-Form  |
 | NN | RT | RA  | RB  | 1  | 10    | 1010 110 |Rc| xpermh    | X-Form  |
 | NN | RT | RA  | RB  | 1  | 10    | 1110 110 |Rc| xpermw    | X-Form  |
-| NN | RT | RA  | RB  | 0  | 11    | 1110 110 |Rc| abssa     | X-Form  |
-| NN | RT | RA  | RB  | 1  | 11    | 1110 110 |Rc| absua     | X-Form  |
+| NN | RT | RA  | RB  | 0  | 11    | 1110 110 |Rc| absdacs   | X-Form  |
+| NN | RT | RA  | RB  | 1  | 11    | 1110 110 |Rc| absdacu   | X-Form  |
 | NN |    |     |     |    |       | --11 110 |Rc| bmrev     | VA2-Form  |
 
 # binary and ternary bitops
@@ -296,11 +296,19 @@ this will only overwrite the dest where the src is greater (or less).
 
 signed/unsigned min/max gives more flexibility.
 
+X-Form
+
+* XO=0001001110, itype=0b00 min, unsigned
+* XO=0101001110, itype=0b01 min, signed
+* XO=0011001110, itype=0b10 max, unsigned
+* XO=0111001110, itype=0b11 max, signed
+
+
 ```
-uint_xlen_t min(uint_xlen_t rs1, uint_xlen_t rs2)
+uint_xlen_t mins(uint_xlen_t rs1, uint_xlen_t rs2)
 { return (int_xlen_t)rs1 < (int_xlen_t)rs2 ? rs1 : rs2;
 }
-uint_xlen_t max(uint_xlen_t rs1, uint_xlen_t rs2)
+uint_xlen_t maxs(uint_xlen_t rs1, uint_xlen_t rs2)
 { return (int_xlen_t)rs1 > (int_xlen_t)rs2 ? rs1 : rs2;
 }
 uint_xlen_t minu(uint_xlen_t rs1, uint_xlen_t rs2)
@@ -322,13 +330,13 @@ uint_xlen_t intavg(uint_xlen_t rs1, uint_xlen_t rs2) {
 }
 ```
 
-## abs
+## absdu
 
 required for the [[sv/av_opcodes]], these exist in Packed SIMD (VSX)
 but not scalar
 
 ```
-uint_xlen_t intabs(uint_xlen_t rs1, uint_xlen_t rs2) {
+uint_xlen_t absdu(uint_xlen_t rs1, uint_xlen_t rs2) {
      return (src1 > src2) ? (src1-src2) : (src2-src1)
 }
 ```