**ISA Comparison Table** - discussion and research at <https://bugs.libre-soc.org/show_bug.cgi?id=893>
-|ISA <br>name |Num <br>opcodes|Num <br>intrinsics|Taxonomy / <br> Class|setvl <br> scalable|Predicate <br> Masks|Twin <br> Predication|Explicit <br> Vector regs|128-bit <br> ops|Bigint |LDST <br> Fault-First|Data-dep<br> Fail-first|Pred-<br> Result|Matrix HW<br> support|DCT/FFT HW<br> support |
-|--------------|---------------|------------------|---------------------|-------------------|--------------------|---------------------|-------------------------|----------------|--------|---------------------|-----------------------|----------------|---------------------|-----------------------|
-|Draft SVP64 |5 [^svp64_prefix] |see [^svp64_intrin_cnt] |Scalable [^svp64_scalable] |yes |yes |yes [^twin_pred] |no [^svp64_no_vec_regs] |see [^svp64_128] |yes [^bigint] |yes [^fail_first] |yes [^data_fail_first] |yes [^pred_result] |yes [^svp64_mat] | yes[^svp64_fft] |
-|VSX |700+ |700+? [^vsx_intrin] |Packed SIMD |no |no |no |yes [^vsx_vec_regs] |yes |no |no |no |no |yes [^ppc_mma] | no |
-|NEON |~250 [^neon_opcodes] |7088 [^neon_intrin] |Packed SIMD |no |no |no |yes |yes |no |no |no |no |no | no |
-|SVE2 |~1000 [^sve2_opcodes] |6040 [^sve2_intrin] |Predicated SIMD[^sve2_no_setvl] |no [^sve2_no_setvl] |yes |no |yes |yes |no |yes [^fail_first] |no |no |yes [^sve2_mat] | no |
-|AVX512 [^avx512_wikipedia] |~1000s [^avx512_opcodes] |7256 [^avx512_intrin] |Predicated SIMD |no |yes |no |yes |yes |no |no |no |no |yes [^x86_amx] | no |
-|RVV [^rvv_spec] |~190 [^rvv_opcodes] |~25000 [^rvv_intrin] |Scalable [^rvv_scalable] |yes |yes |no |yes |yes [^rvv_128] |no |yes |no |no |no | no |
-|Aurora SX[^sx_aurora] |~200 [^aurora_isa] |unknown [^aurora_intrin] |Scalable [^aurora_scalable] |yes |yes |no |yes |no |no |no |no |no |? | no |
+|ISA <br>name |Num <br>opcodes |Num <br>intrinsics |Taxonomy / <br> Class |setvl <br> scalable|Predicate <br> Masks|Twin <br> Predication|Explicit <br> Vector regs|128-bit <br> ops|Bigint |LDST <br> Fault-First|Data-dep<br> Fail-first|Pred-<br> Result |Matrix HW<br> support|DCT/FFT HW<br> support |
+|--------------------------|------------------------|------------------------|-------------------------------|-------------------|--------------------|---------------------|-------------------------|----------------|-------------|---------------------|-----------------------|------------------|---------------------|-----------------------|
+|Draft SVP64 |5 [^svp64_prefix] |see [^svp64_intrin_cnt] |Scalable [^svp64_scalable] |yes |yes |yes [^twin_pred] |no [^svp64_no_vec_regs] |see [^svp64_128]|yes [^bigint]|yes [^fail_first] |yes [^data_fail_first] |yes [^pred_result]|yes [^svp64_mat] | yes[^svp64_fft] |
+|VSX |700+ |700+? [^vsx_intrin] |Packed SIMD |no |no |no |yes [^vsx_vec_regs] |yes |no |no |no |no |yes [^ppc_mma] | no |
+|NEON |~250 [^neon_opcodes] |7088 [^neon_intrin] |Packed SIMD |no |no |no |yes |yes |no |no |no |no |no | no |
+|SVE2 |~1000 [^sve2_opcodes] |6040 [^sve2_intrin] |Predicated SIMD[^sve2_no_setvl]|no [^sve2_no_setvl]|yes |no |yes |yes |no |yes [^fail_first] |no |no |yes [^sve2_mat] | no |
+|AVX512 [^avx512_wikipedia]|~1000s [^avx512_opcodes]|7256 [^avx512_intrin] |Predicated SIMD |no |yes |no |yes |yes |no |no |no |no |yes [^x86_amx] | no |
+|RVV [^rvv_spec] |~190 [^rvv_opcodes] |~25000 [^rvv_intrin] |Scalable [^rvv_scalable] |yes |yes |no |yes |yes [^rvv_128] |no |yes |no |no |no | no |
+|Aurora SX[^sx_aurora] |~200 [^aurora_isa] |unknown [^aurora_intrin]|Scalable [^aurora_scalable] |yes |yes |no |yes |no |no |no |no |no |? | no |
[^svp64_prefix]: plus EXT001 24-bit prefixing using 25% of EXT001 space. See [[sv/svp64]]
[^svp64_scalable]: A 2-Dimensional Scalable Vector ISA **specifically designed for the Power ISA** with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]
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