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[libreriscv.git]
/
openpower
/
sv
/
predication.mdwn
diff --git
a/openpower/sv/predication.mdwn
b/openpower/sv/predication.mdwn
index 7e866414f2eff914e68f98cda744c4519eb98320..31eecfafc595f26dce6107910eb047e333257ca9 100644
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--- a/
openpower/sv/predication.mdwn
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openpower/sv/predication.mdwn
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-1,6
+1,7
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# TODO ideas
-<https://bugs.libre-soc.org/show_bug.cgi?id=213>
+<https://bugs.libre-soc.org/show_bug.cgi?id=527>
+
* idea 1: modify cmp (and other CR generators?) with qualifiers that
create single bit prefix vector into int reg