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[libreriscv.git] / openpower / sv / predication.mdwn

diff --git a/openpower/sv/predication.mdwn b/openpower/sv/predication.mdwn
index 1d6fe738b78193afa3eef5828d90e4b7490a64b3..bcad872d59a3a0fc3bab9eb5d30b7ee230799031 100644 (file)
--- a/openpower/sv/predication.mdwn
+++ b/openpower/sv/predication.mdwn
@@ -66,7 +66,7 @@ In addition those scalar 64-bit bitmanip operations, although some of them are o
 
 (Hilariously and confusingly those very same scalar bitmanip opcodes may themselves be SV-vectorised however with VL only being up to 64 elements it is not anticipated that SV-bitmanip would be used to generate up to 64 bit predicate masks, when a single 64 bit scalar operation will suffice).
 
-Adding a full set special vector opcodes just for manipulating predicate masks and being able to transfer them to other regfiles (a la mfcr) is however anomalous, costly, and unnecessary.
+The summary is that adding a full set special vector opcodes just for manipulating predicate masks and being able to transfer them to other regfiles (a la mfcr) is anomalous, costly, and unnecessary.
 
 ## CR-based predication proposal