# Register Type Tags
+**UNDER CONSIDERATION**
+
A concept present in processors such as Texas Instruments DSPs and in the Mill Architecture to an advanced level, register "tags" allow the meaning and behaviour of instructions to change, polymorphically.
-This allows instructions originally designed to only be IEEE754 FP64 fir example to become IEEE754 FP128 or even complex mumbers. With SVP64 supporting [[sv/remap]] it is not conceptually that much of a leap to support complex numbers, given that the hardware to do so is already in place.
+This for allows instructions originally designed to only be IEEE754 FP64 for example to become IEEE754 FP128 or even complex mumbers. With SVP64 supporting [[sv/remap]] it is not conceptually that much of a leap to support complex numbers, given that the hardware to do so is already in place.
+
+It is however extremely important to keep the tag context down to a bare minimum size, because, like SVSTATE, it has to be added to the interrupt context alongside SRR0 and SRR1.
+
+Interestingly due to the size of complex numbers (and FP128) there is not much point having large tags. It is quite likely therefore that a 64 bit SPR of 2 bits per register, covering 128 registers, would be sufficient. Groups of 4 registers would be tagged:
+
+* SVTAG[0:1] marks all of FPR[0..3] and GPR[0..3]
+
+
+Links:
+
+* <http://lists.libre-soc.org/pipermail/libre-soc-dev/2021-June/003256.html>
+
+# Complex numbers
+Currently under discussion is which arithmetic operations should be supported: complex divide for example is known to be very tricky. Add and subtract are easy: multiply involves four scalar multiplies, one add and one subtract. This fits within the REMAP system capabilities.
projects / libreriscv.git / blobdiff