* hphint - Horizontal Parallelism Hint. In Vertical First Mode
hardware **MAY** perform up to this many elements in parallel
per instruction. Set to zero to indicate "no hint".
+* SVme - REMAP enable bits, indicating which register is to be
+ REMAPed. RA, RB, RC, RT or EA.
+* mi0-mi4 - when the corresponding SVme bit is enabled, mi0-mi4
+ indicate the SVSHAPE (0-3) that the corresponding register (RA etc)
+ should use.
For hphint, the number chosen must be consistently
executed **every time**. Hardware is not permitted to execute five
| 38:39 | mo0 | REMAP RT SVSHAPE0-3 |
| 40:41 | mo1 | REMAP EA SVSHAPE0-3 |
| 42:46 | SVme | REMAP enable (RA-RT) |
-| 47:t4 | rsvd | reserved |
+| 47:54 | rsvd | reserved |
| 55:61 | hphint | horizontal parallelism hint |
| 62 | RMpst | REMAP persistence |
| 63 | vfirst | Vertical First mode |
hardware **must** save/restore SVSTATE in SVSRR0 at exactly the same
time that SRR0 is saved/restored in PC and SRR1 in MSR.
-The SPR name given for the purposes of saving/restoring SVSTATE is SVSRR0.
+The SPR name given for the purposes of saving/restoring
+SVSTATE is SVSRR0.