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[libreriscv.git] / openpower.mdwn
index 35a8b5f9be80bf6413ab1ba5dc175b2073c8c0d4..be3bb7a2a0df336bb796fd1b83fd26d1e9012285 100644 (file)
@@ -9,6 +9,12 @@ i5, i7, i9 etc. and are frequently conflated with versions of the OpenPOWER ISA
 Libre-SOC is basing its [[Simple-V Vectorisation|sv]] CPU extensions on OpenPOWER because it wants to be able to specify a machine that can be completely trusted, and because OpenPOWER, thanks to IBM's involvement,
 is designed for high performance.
 
+See wikipedia page 
+<https://en.m.wikipedia.org/wiki/Power_ISA>
+
+very useful resource describing all assembly instructions
+<https://www.ibm.com/docs/en/aix/7.1?topic=reference-instruction-set>
+
 # Evaluation
 
 EULA released! looks good.
@@ -20,6 +26,7 @@ EULA released! looks good.
   <https://openpowerfoundation.org/membership/how-to-join/membership-kit-9-27-16-4/>
 * OpenPower HDL Mailing list <http://lists.mailinglist.openpowerfoundation.org/mailman/listinfo/openpower-hdl-cores>
 * [[openpower/isatables]]
+* [[openpower/whitepapers]]
 * [[openpower/isa]] - pseudo-code extracted from POWER V3.0B PDF spec
 * [[openpower/gem5]]
 * [[openpower/sv]]