scc: Add -specify option to find loops in boxes

[yosys.git] / passes / cmds / edgetypes.cc

diff --git a/passes/cmds/edgetypes.cc b/passes/cmds/edgetypes.cc
index 58ed6457dea5762234309de2078f44837af23264..37c4204002eaa32fa1a1b92ab344d235cada939e 100644 (file)
--- a/passes/cmds/edgetypes.cc
+++ b/passes/cmds/edgetypes.cc
@@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN
 
 struct EdgetypePass : public Pass {
        EdgetypePass() : Pass("edgetypes", "list all types of edges in selection") { }
-       void help() YS_OVERRIDE
+       void help() override
        {
                //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
                log("\n");
@@ -35,7 +35,7 @@ struct EdgetypePass : public Pass {
                log("is a 4-tuple of source and sink cell type and port name.\n");
                log("\n");
        }
-       void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
+       void execute(std::vector<std::string> args, RTLIL::Design *design) override
        {
                size_t argidx;
                for (argidx = 1; argidx < args.size(); argidx++) {