Merge pull request #3185 from YosysHQ/micko/co_sim

[yosys.git] / passes / pmgen / peepopt_shiftmul.pmg

diff --git a/passes/pmgen/peepopt_shiftmul.pmg b/passes/pmgen/peepopt_shiftmul.pmg
index fe861b728301d0786a5acca528ebdde562d1192f..d71fbf74449dc416ab615cf9bf1fd6817165c69a 100644 (file)
--- a/passes/pmgen/peepopt_shiftmul.pmg
+++ b/passes/pmgen/peepopt_shiftmul.pmg
@@ -1,4 +1,7 @@
 pattern shiftmul
+//
+// Optimize mul+shift pairs that result from expressions such as foo[s*W+:W]
+//
 
 state <SigSpec> shamt
 
@@ -28,33 +31,34 @@ match mul
        select mul->type.in($mul)
        select port(mul, \A).is_fully_const() || port(mul, \B).is_fully_const()
        index <SigSpec> port(mul, \Y) === shamt
+       filter !param(mul, \A_SIGNED).as_bool()
 endmatch
 
 code
+{
        IdString const_factor_port = port(mul, \A).is_fully_const() ? \A : \B;
-       IdString const_factor_signed = const_factor_port == \A ? \A_SIGNED : \B_SIGNED;
        Const const_factor_cnst = port(mul, const_factor_port).as_const();
        int const_factor = const_factor_cnst.as_int();
 
        if (GetSize(const_factor_cnst) == 0)
                reject;
 
-       if (const_factor_cnst.bits[GetSize(const_factor_cnst)-1] != State::S0 &&
-                       param(mul, const_factor_signed).as_bool())
-               reject;
-
        if (GetSize(const_factor_cnst) > 20)
                reject;
 
        if (GetSize(port(shift, \Y)) > const_factor)
                reject;
 
+       int factor_bits = ceil_log2(const_factor);
+       SigSpec mul_din = port(mul, const_factor_port == \A ? \B : \A);
+
+       if (GetSize(shamt) < factor_bits+GetSize(mul_din))
+               reject;
+
        did_something = true;
        log("shiftmul pattern in %s: shift=%s, mul=%s\n", log_id(module), log_id(shift), log_id(mul));
 
-       int new_const_factor_log2 = ceil_log2(const_factor);
-       int new_const_factor = 1 << new_const_factor_log2;
-
+       int new_const_factor = 1 << factor_bits;
        SigSpec padding(State::Sx, new_const_factor-const_factor);
        SigSpec old_a = port(shift, \A), new_a;
        int trunc = 0;
@@ -73,7 +77,7 @@ code
        if (trunc > 0)
                new_a.remove(GetSize(new_a)-trunc, trunc);
 
-       SigSpec new_b = {port(mul, const_factor_port == \A ? \B : \A), SigSpec(State::S0, new_const_factor_log2)};
+       SigSpec new_b = {mul_din, SigSpec(State::S0, factor_bits)};
        if (param(shift, \B_SIGNED).as_bool())
                new_b.append(State::S0);
 
@@ -83,5 +87,6 @@ code
        shift->setParam(\B_WIDTH, GetSize(new_b));
 
        blacklist(shift);
-       reject;
+       accept;
+}
 endcode