add example

[libreriscv.git] / pinmux / pinmux_chennai_2018.tex

diff --git a/pinmux/pinmux_chennai_2018.tex b/pinmux/pinmux_chennai_2018.tex
index 8dbcacc9a657e2d1cad67e2db349ff2caf9299b8..c8459082e0813e79c78064b3d23b55d72ead2456 100644 (file)
--- a/pinmux/pinmux_chennai_2018.tex
+++ b/pinmux/pinmux_chennai_2018.tex
@@ -16,6 +16,9 @@
     \vspace{32pt}
     \Large{Auto-generating documentation, code \\
                        and resources for a Pinmux}\\
+    \vspace{16pt}
+    \Large{Saving time and money for SoC / EC designers\\
+                   in the RISC-V Ecosystem and beyond}\\
     \vspace{24pt}
     \Large{[proposed for] Chennai 9th RISC-V Workshop}\\
     \vspace{16pt}
@@ -39,17 +42,16 @@
    \item Pin: an I/O pad.  May be driven (input) or may drive (output).
    \item FN: term for a single-wire "function", such as UART\_TX,
             I2C\_SDA, SDMMC\_D0 etc.  may be an input, output or both
-                (bi-directional case: two wires are always allocated, one
+                (bi-directional case: two wires are {\bf always} allocated, one
                  for input to the function and one for output from the function).
    \item Bus: a group of bi-directional functions (SDMMC D0 to D3)
-         where the direction is ganged and under the Bus's control
+         where the direction is ganged and {\bf under the Bus's control}
    \item Input Priority Muxer: a multiplexer with N selector
                 wires and N associated inputs.  The lowest (highest?) indexed
                 "selector" enabled results in its 
                 input being routed to the output.
-   \item Output Demuxer: a one-to-many "redirector" where a single
-            input is "routed" to any one output, based
-            on a selector.
+   \item Output Muxer: a many-to-one "redirector" where any one
+            output "routed" to the input, based on a selector "address".
   \end{itemize}
 }
 
@@ -153,6 +155,19 @@
 }
 
 
+
+\frame{\frametitle{Example: 7 banks, 4-way mux, 160 pins}
+ \begin{center}
+  \includegraphics[height=1.7in]{example_pinmux.jpg}
+ \end{center}
+ \begin{itemize}
+   \item { \bf 17,500 lines of auto-generated HDL (and climbing)}
+   \item { \bf 12,500 lines of auto-generated Summary/Analysis}
+   \item Technical Reference Manual expected to be 100+ pages
+ \end{itemize}
+}
+
+
 \frame{\frametitle{Muxer cases to handle (One/Many to One/Many) etc.}
 
  \begin{itemize}
@@ -241,6 +256,21 @@
 }
 
 
+\frame{\frametitle{Output Muxer (very simple)}
+ \begin{center}
+  \includegraphics[height=1.1in]{reg_gpio_out_mux.jpg}\\
+  {\bf Ouput Muxer using 2-bit address selection}\\
+ \end{center}
+ \begin{itemize}
+   \item Very straightforward (deceptively so, like SRAM cells)
+   \item Used in both OUT routing and Direction-control routing\\
+            (same address for each, connected to same FNs)
+   \item More complex pinmux will have 3-bit addressing (8 FNs)\\
+                (Note: not all outputs will be connected, depends on pinmux)
+ \end{itemize}
+}
+
+
 \frame{\frametitle{In/Out muxing, direction control: GPIO just a FN}
  \begin{center}
   \includegraphics[height=2.5in]{reg_gpio_fn_ctrl.jpg}\\
@@ -276,7 +306,7 @@
 }
 
 
-\frame{\frametitle{Input Mux Wiring}
+\frame{\frametitle{Input Priority-Mux Wiring: very different from Out-Mux}
  \begin{center}
   \includegraphics[height=2.5in]{reg_gpio_in_wiring.jpg}\\
   {\bf Pin Mux selection vals NOT same as FN selection vals}
@@ -284,6 +314,29 @@
 }
 
 
+\frame{\frametitle{Input Priority-Mux Wiring}
+
+ \begin{itemize}
+   \item In-Muxer selection number (0,1,2,3) obviously has to match
+         with Out-Muxer order (otherwise a bi-directional FN
+         needs different Mux-register settings for
+          selecting either IN or OUT)
+            \vspace{6pt}
+   \item Priority-mux selection values do not actually matter,
+         and have nothing to do with the actual Muxer settings.
+            \vspace{6pt}
+   \item GPIO FN's input muxer is nothing more than an AND gate\\
+         (you never route more than one pin to one GPIO)
+            \vspace{6pt}
+   \item Any other FN with only 1:1 In also an AND gate \\
+            (this just always happens to be true for GPIO)
+            \vspace{6pt}
+   \item Not all FNs have input capability: clearly they will not
+            be included in the In-Muxing. 
+  \end{itemize}
+}
+
+
 \frame{\frametitle{Summary}
 
  \begin{itemize}