add link to tomasulo_transformation for notes on "nameless" registers

[libreriscv.git] / resources.mdwn

diff --git a/resources.mdwn b/resources.mdwn
index 26c8b314c81b30f8c2eb496697e678bca8733780..3d13ab4c4f6f33de45cc02f1eb8979cd6bdb64d3 100644 (file)
--- a/resources.mdwn
+++ b/resources.mdwn
@@ -31,6 +31,14 @@ This section is primarily a series of useful links found online
 
 * [OpenPOWER OpenFSI Compliance Spec](http://openpowerfoundation.org/wp-content/uploads/resources/openpower-fsi-thts-1.0/openpower-fsi-thts-20180130.pdf)
 
+# JTAG
+
+* [Useful JTAG implementation reference: Design Of IEEE 1149.1 TAP Controller IP Core by Shelja, Nandakumar and Muruganantham, DOI:10.5121/csit.2016.60910](https://web.archive.org/web/20201021174944/https://airccj.org/CSCP/vol6/csit65610.pdf)
+
+    Abstract
+
+    "The objective of this work is to design and implement a TAP controller IP core compatible with IEEE 1149.1-2013 revision of the standard. The test logic architecture also includes the Test Mode Persistence controller and its associated logic. This work is expected to serve as a ready to use module that can be directly inserted in to a new digital IC designs with little modifications."
+
 # RISC-V Instruction Set Architecture
 
 **PLEASE UPDATE** - we are no longer implementing full RISCV, only user-space
@@ -65,6 +73,10 @@ for comparative/informative purposes with regard to Simple-V.
 ## D-Cache Possible Optimizations papers and links
 - [ACDC: Small, Predictable and High-Performance Data Cache](https://dl.acm.org/doi/10.1145/2677093)
 
+# BW Enhancing Shared L1 Cache Design research done in cooperation with AMD
+- [Youtube video PACT 2020 - Analyzing and Leveraging Shared L1 Caches in GPUs](https://m.youtube.com/watch?v=CGIhOnt7F6s)
+- [Url to PDF of paper on author's website (clicking will download the pdf)](https://adwaitjog.github.io/docs/pdf/sharedl1-pact20.pdf)
+
 
 # RTL Arithmetic SQRT, FPU etc.
 
@@ -158,6 +170,11 @@ although performance is not evaluated.
 
 * [Pixilica 3D Graphical ISA Slides](https://b5792ddd-543e-4dd4-9b97-fe259caf375d.filesusr.com/ugd/841f2a_c8685ced353b4c3ea20dbb993c4d4d18.pdf)
 
+# 3D Graphics Texture compression software and hardware
+
+* [Proprietary Rad Game Tools Oddle Texture Software Compression](https://web.archive.org/web/20200913122043/http://www.radgametools.com/oodle.htm)
+
+* [Blog post by one of the engineers who developed the proprietary Rad Game Tools Oddle Texture Software Compression and the Oodle Kraken decompression software and hardware decoder used in the ps5 ssd](https://archive.vn/oz0pG)
 
 # Various POWER Communities
  - [An effort to make a 100% Libre POWER Laptop](https://www.powerpc-notebook.org/en/)
@@ -330,6 +347,10 @@ Some learning resources I found in the community:
   <https://github.com/vmware/cascade>
 * Multi-read/write ported memories
   <https://tomverbeure.github.io/2019/08/03/Multiport-Memories.html>
+* Data-dependent fail-on-first aka "Fault-tolerant speculative vectorisation"
+  <https://arxiv.org/pdf/1803.06185.pdf>
+* OpenPOWER Foundation Membership
+  <https://openpowerfoundation.org/membership/how-to-join/membership-kit-9-27-16-4/>
 
 
 # Real/Physical Projects