[Raymond Chen's PowerPC series](https://devblogs.microsoft.com/oldnewthing/20180806-00/?p=99425)
+## OpenPOWER OpenFSI Spec (2016)
+
+* [OpenPOWER OpenFSI Spec](http://openpowerfoundation.org/wp-content/uploads/resources/OpenFSI-spec-100/OpenFSI-spec-20161212.pdf)
+
+* [OpenPOWER OpenFSI Compliance Spec](http://openpowerfoundation.org/wp-content/uploads/resources/openpower-fsi-thts-1.0/openpower-fsi-thts-20180130.pdf)
+
# RISC-V Instruction Set Architecture
**PLEASE UPDATE** - we are no longer implementing full RISCV, only user-space
to the V extension so it would be good to include it here as a reference
for comparative/informative purposes with regard to Simple-V.
-## Radix MMU
+# Radix MMU
- [Qemu emulation](https://github.com/qemu/qemu/commit/d5fee0bbe68d5e61e2d2beb5ff6de0b9c1cfd182)
+# D-Cache
+
+## D-Cache Possible Optimizations papers and links
+- [ACDC: Small, Predictable and High-Performance Data Cache](https://dl.acm.org/doi/10.1145/2677093)
+
# RTL Arithmetic SQRT, FPU etc.
1-deep / 2-register FIFO synchronizer.
* <http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-143.pdf>
Understanding Latency Hiding on GPUs, by Vasily Volkov
+* Efabless "Openlane" <https://github.com/efabless/openlane>
+* Co-simulation plugin for verilator, transferring to ECP5
+ <https://github.com/vmware/cascade>
# Real/Physical Projects