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[libreriscv.git] / resources.mdwn

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--- a/resources.mdwn
+++ b/resources.mdwn
@@ -25,6 +25,12 @@ This section is primarily a series of useful links found online
 
 [Raymond Chen's PowerPC series](https://devblogs.microsoft.com/oldnewthing/20180806-00/?p=99425)
 
+## OpenPOWER OpenFSI Spec (2016)
+
+* [OpenPOWER OpenFSI Spec](http://openpowerfoundation.org/wp-content/uploads/resources/OpenFSI-spec-100/OpenFSI-spec-20161212.pdf)
+
+* [OpenPOWER OpenFSI Compliance Spec](http://openpowerfoundation.org/wp-content/uploads/resources/openpower-fsi-thts-1.0/openpower-fsi-thts-20180130.pdf)
+
 # RISC-V Instruction Set Architecture
 
 **PLEASE UPDATE** - we are no longer implementing full RISCV, only user-space
@@ -51,9 +57,14 @@ at the moment. However, there are many wiki pages that make a reference
 to the V extension so it would be good to include it here as a reference
 for comparative/informative purposes with regard to Simple-V.
 
-## Radix MMU
+# Radix MMU
  - [Qemu emulation](https://github.com/qemu/qemu/commit/d5fee0bbe68d5e61e2d2beb5ff6de0b9c1cfd182)
 
+# D-Cache
+
+## D-Cache Possible Optimizations papers and links
+- [ACDC: Small, Predictable and High-Performance Data Cache](https://dl.acm.org/doi/10.1145/2677093)
+
 
 # RTL Arithmetic SQRT, FPU etc.
 
@@ -70,6 +81,7 @@ for comparative/informative purposes with regard to Simple-V.
  - Does not have an easy way of computing tan(x)
 * [zipcpu CORDIC](https://zipcpu.com/dsp/2017/08/30/cordic.html)
 * [Low latency and Low error floating point TCORDIC](https://ieeexplore.ieee.org/document/7784797) (email Michael or Cole if you don't have IEEE access)
+* <http://www.myhdl.org/docs/examples/sinecomp/> MyHDL version of CORDIC
 
 ## IEEE Standard for Floating-Point Arithmetic (IEEE 754)
 
@@ -83,6 +95,14 @@ it is unfortunately not freely available and requires a payment to
 access. However, each of the Libre RISC-V members already have access
 to the document.
 
+* [Lecture notes - Floating Point Appreciation](http://pages.cs.wisc.edu/~markhill/cs354/Fall2008/notes/flpt.apprec.html)
+
+Among other things, has a nice explanation on arithmetic, rounding modes and the sticky bit.
+
+* [What Every Computer Scientist Should Know About Floating-Point Arithmetic](https://docs.oracle.com/cd/E19957-01/806-3568/ncg_goldberg.html)
+
+Nice resource on rounding errors (ulps and epsilon) and the "table maker's dilemma".
+
 ## Past FPU Mistakes to learn from
 
 * [Intel Underestimates Error Bounds by 1.3 quintillion on 
@@ -305,6 +325,9 @@ Some learning resources I found in the community:
   1-deep / 2-register FIFO synchronizer.
 * <http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-143.pdf>
   Understanding Latency Hiding on GPUs, by Vasily Volkov
+* Efabless "Openlane" <https://github.com/efabless/openlane>
+* Co-simulation plugin for verilator, transferring to ECP5
+  <https://github.com/vmware/cascade>
 
 
 # Real/Physical Projects
@@ -362,3 +385,11 @@ This list auto-generated from a page tag "standards":
 * [[resources/server-setup/git-mirroring]]
 * [[resources/server-setup/nagios-monitoring]]
 
+# Testbeds
+
+* <https://www.fed4fire.eu/testbeds/>
+
+# Really Useful Stuff
+
+* <https://github.com/im-tomu/fomu-workshop/blob/master/docs/requirements.txt>
+* <https://github.com/im-tomu/fomu-workshop/blob/master/docs/conf.py#L39-L47>