Add link to Robert Baruch's nMigen resources (GitHub and YouTube)

[libreriscv.git] / resources.mdwn

diff --git a/resources.mdwn b/resources.mdwn
index 428475b4efe62012e609ca67f92b748589675dfd..a8e39b2fa5dadaaaef886306f4199389fadff486 100644 (file)
--- a/resources.mdwn
+++ b/resources.mdwn
@@ -23,7 +23,7 @@ This section is primarily a series of useful links found online
 
 ## Overview of the user ISA:
 
-(https://devblogs.microsoft.com/oldnewthing/20180806-00/?p=99425)
+[Raymond Chen's PowerPC series](https://devblogs.microsoft.com/oldnewthing/20180806-00/?p=99425)
 
 # RISC-V Instruction Set Architecture
 
@@ -261,6 +261,9 @@ ZipCPU provides a comprehensive tutorial for beginners and many exercises/quizze
   RTL for a SOC configured with cache, a RISCV core, ethernet, DRAM support,
   and parameterizeable CSRs.
 * [Migen Tutorial](http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>)
+
+* There is a great guy, Robert Baruch, who has a good [tutorial](https://github.com/RobertBaruch/nmigen-tutorial) on nMigen. He also build an FPGA-proven Motorola 6800 CPU clone with nMigen and put [the code](https://github.com/RobertBaruch/n6800) and [instructional videos](https://www.youtube.com/playlist?list=PLEeZWGE3PwbbjxV7_XnPSR7ouLR2zjktw) online.
+
 * [Minerva](https://github.com/lambdaconcept/minerva)
   An SOC written in Python nMigen DSL