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[libreriscv.git] / resources.mdwn

diff --git a/resources.mdwn b/resources.mdwn
index e457e92457f21ee335c39e06f36e76a71b475a61..c97da9bbea90751e5cc51a724edbfc0b689ab08a 100644 (file)
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+++ b/resources.mdwn
@@ -20,6 +20,7 @@ This section is primarily a series of useful links found online
 
 * [3.0 PDF](https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0)
 * [2.07 PDF](https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b)
+* Virginia Tech course <https://github.com/w-feng/CompArch-MIPS-POWER>
 
 ## Overview of the user ISA:
 
@@ -36,6 +37,10 @@ This section is primarily a series of useful links found online
 
 * https://arxiv.org/abs/2002.10143
 
+# Open Access Publication locations
+
+* <https://open-research-europe.ec.europa.eu/browse/engineering-and-technology>
+
 # Communities
 
 * <https://www.reddit.com/r/OpenPOWER/>
@@ -48,6 +53,11 @@ This section is primarily a series of useful links found online
 * EABI 1.9 supplement <https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html>
 * https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.pdf
 
+# Similar concepts
+
+* <https://www.tdx.cat/bitstream/handle/10803/674224/TCRL1de1.pdf> Vector registers may be
+  made "ultra-wide" (SX Aurora / Cray)
+
 # Other GPU Specifications
 
 * 
@@ -378,6 +388,7 @@ VAMP CPU
 
 # Other
 
+* <https://github.com/chrische-xx/mpw7> 10-bit SAR ADC
 * Cray-1 Pocket Reference
   <https://nitter.it/aka_pugs/status/1546576975166201856>
   <https://ftp.libre-soc.org/cray-1-pocket-ref/>
@@ -528,9 +539,17 @@ This list auto-generated from a page tag "standards":
 * <https://arxiv.org/pdf/1501.06511.pdf>
 * <https://bivector.net/index.html>
 
+# Handy Compiler Algorithms for SimpleV
+
+Requires aligned registers:
+* [Graph Coloring Register Allocation for Processors with Multi-Register Operands](https://dl.acm.org/doi/pdf/10.1145/93548.93552)
+More general:
+* [Retargetable Graph-Coloring Register Allocation for Irregular Architectures](https://user.it.uu.se/~svenolof/wpo/AllocSCOPES2003.20030626b.pdf)
+
 # TODO investigate
 
 ```
+     https://www.nextplatform.com/2022/08/22/the-expanding-cxl-memory-hierarchy-is-inevitable-and-good-enough/
      https://github.com/idea-fasoc/OpenFASOC
      https://www.quicklogic.com/2020/06/18/the-tipping-point/
      https://www.quicklogic.com/blog/