add standards tag

[libreriscv.git] / resources.mdwn

diff --git a/resources.mdwn b/resources.mdwn
index ba4b5b694902d5d57b6c08ae650312d2fe49fc1e..e5a46b09f704fe4fea325e8ae0de849a11dc9f9b 100644 (file)
--- a/resources.mdwn
+++ b/resources.mdwn
@@ -4,6 +4,13 @@ This page aims to collect all the resources and specifications we need
 in one place for quick access. We will try our best to keep links here
 up-to-date. Feel free to add more links here.
 
+# Libre-RISC-V Standards
+
+This list auto-generated from a page tag "standards":
+
+[[!inline pages="tagged(standards)" actions="no" archive="yes" quick="yes"]]
+
+
 # RISC-V Instruction Set Architecture
 
 The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name