Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / sw.h

diff --git a/riscv/insns/sw.h b/riscv/insns/sw.h
index dbe260f59cc628ec4c467b1e879eda48de6694de..81ca71dd40ed6602463a2177785a89b6cb3fc9f0 100644 (file)
--- a/riscv/insns/sw.h
+++ b/riscv/insns/sw.h
@@ -1 +1 @@
-mmu.store_uint32(RS1+BIMM, RS2);
+MMU.store_uint32(BTYPE_EADDR, RS2);