enum {
IR_IDCODE=1,
IR_DTMCONTROL=0x10,
- IR_DBUS=0x11
+ IR_DBUS=0x11,
+ IR_RESET=0x1c
};
#define DTMCONTROL_VERSION 0xf
dm(dm),
_tck(false), _tms(false), _tdi(false), _tdo(false),
dtmcontrol((abits << DTM_DTMCS_ABITS_OFFSET) | 1),
- dmi(DMI_OP_STATUS_FAILED << DTM_DMI_OP_OFFSET),
+ dmi(DMI_OP_STATUS_SUCCESS << DTM_DMI_OP_OFFSET),
_state(TEST_LOGIC_RESET)
{
}
case SHIFT_IR:
_tdo = ir & 1;
break;
- case UPDATE_IR:
- break;
+ //case UPDATE_IR:
+ //if (ir == IR_RESET) {
+ // Make a reset happen
+ //}
+ //break;
default:
break;
}