Rework RAM port for nMigen compliance

[gram.git] / setup.py

diff --git a/setup.py b/setup.py
index 19bf8fd7b50887c0ab6ae506e102adc16ae1432e..17b553114e372ad4b2266507613596673da75340 100755 (executable)
--- a/setup.py
+++ b/setup.py
@@ -6,12 +6,11 @@ from setuptools import find_packages
 
 setup(
     name="gram",
-    description="Small footprint and configurable DRAM core",
-    author="Florent Kermarrec",
-    author_email="florent@enjoy-digital.fr",
-    url="http://enjoy-digital.fr",
-    download_url="https://github.com/enjoy-digital/litedram",
-    test_suite="test",
+    description="DRAM core for LambdaSoC",
+    author="LambdaConcept",
+    author_email="contact@lambdaconcept.com",
+    url="https://lambdaconcept.com",
+    download_url="https://github.com/lambdaconcept/gram",
     license="BSD",
     python_requires="~=3.6",
     install_requires=["pyyaml"],