and currently responsible for coordinating the design of a fully Libre
RISC-V SoC in collaboration with the RISE Group, IIT Madras, Shakti Project.
+Hardware available:
+
+* lkcl: ZC706
+* xing: zynq-7020 and Xilinx XC7A100T-484
+
# Discussion and Links
* <https://elinux.org/images/b/b6/Pin_Control_Subsystem_Overview.pdf>