(no commit message)

[libreriscv.git] / shakti / m_class / todo.mdwn

diff --git a/shakti/m_class/todo.mdwn b/shakti/m_class/todo.mdwn
index 3b7db751e0c884f0db64c1c10a451d56989cd44c..2671bf61dde3a227938b979bb2c1cff624cb2761 100644 (file)
--- a/shakti/m_class/todo.mdwn
+++ b/shakti/m_class/todo.mdwn
@@ -1,12 +1,14 @@
 # TODO list summary
 
-See diagram:
+Issues tracked on <http://bugs.libre-riscv.org>
+
 [[shakti_libre_riscv.jpg]]
 
 ## RISC-V team
 
 * RV64GC SMP Core
-* Analyse and decide L1 / L2 cache sizes
+* Analyse and decide L1 / L2 cache sizes (*underway*)
+* Quad SPI (down-compatible to 1-bit SPI) (*done*) [[QSPI]]
 
 ## Richard Herveille
 
@@ -19,10 +21,9 @@ See diagram:
 
 ## TBD
 
-* 1/2/4-bit SD/MMC
-* eMMC (8-bit SD/MMC)
+* 1/2/4-bit SD/MMC (Rudi?)
+* eMMC (8-bit SD/MMC) (Rudi?)
 * DDR3/DDR4 PHY
-* Quad SPI (down-compatible to 1-bit SPI)
 * Pinmux (underway)
 * Video Processing Block
 * 3D Engine (Nyuzi?)