add links

[libreriscv.git] / shakti / m_class.mdwn

diff --git a/shakti/m_class.mdwn b/shakti/m_class.mdwn
index 8cdcc4e5e20b828640752371ca3ca539a84b2c42..970b6eb06b83ac027f1da312ebe744342e90232e 100644 (file)
--- a/shakti/m_class.mdwn
+++ b/shakti/m_class.mdwn
@@ -10,6 +10,7 @@ yields.
 * See [[pinouts]] for auto-generated table of pinouts (including mux)
 * See [[peripheralschematics]] for example Reference Layouts
 * See [[ramanalysis]] for a comprehensive analysis of why DDR3 is to be used.
+* See [[todo]] for a rough list of tasks (and link to bugtracker)
 
 ## Rough specification.
 
@@ -24,6 +25,8 @@ to be used (8-10mil) and 4-5mil tracks with 4mil clearance.  For
 details see
 <http://processors.wiki.ti.com/index.php/General_hardware_design/BGA_PCB_design>
 
+[[shakti_libre_riscv.jpg]]
+
 ## Targetting full Libre Licensing to the bedrock.
 
 The only barrier to being able to replicate the masks from scratch
@@ -190,6 +193,7 @@ TBD
 
 # Proposed Interfaces
 
+* Plain [[GPIO]] multiplexed with a [[pinmux]] onto (nearly) all other pins
 * RGB/TTL up to 1440x900 @ 60fps, 24-bit colour
 * 2x 1-lane SPI
 * 1x 4-lane (quad) SPI
@@ -199,24 +203,29 @@ TBD
 * 3x [[I2C]] (in case of address clashes between peripherals)
 * 8080-style AT/XT/ATI MCU Bus Interface, with multiple (8x CS#) lines
 * 3x [[PWM]]-capable GPIO
-* 32x EINT-cable GPIO with full edge-triggered and low/high IRQ capability
+* 32x [[EINT]]-cable GPIO with full edge-triggered and low/high IRQ capability
 * 1x [[I2S]] audio with 4-wire output and 1-wire input.
 * 3x USB2 (ULPI for reduced pincount) each capable of USB-OTG support
 * DDR3/DDR3L/LPDDR3 32-bit-wide memory controller
 
 Some interfaces at:
 
+* <https://github.com/RoaLogic/apb4_gpio>
 * <https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/>
   includes GPIO, SPI, UART, JTAG, I2C, PinCtrl, UART and PWM.  Also included
   is a Watchdog Timer and others.
 * <https://github.com/sifive/freedom/blob/master/src/main/scala/everywhere/e300artydevkit/Platform.scala>
   Pinmux ("IOF") for multiplexing several I/O functions onto a single pin
+* <https://bitbucket.org/casl/c-class/src/0e77398a030bfd705930d0f1b8b9b5050d76e265/src/peripherals/?at=master>
+  including AXI, DMA, GPIO, I2C, JTAG, PLIC, QSPI, SDRAM, UART (and TCM?).  FlexBus, HyperBus and xSPI to
+  be added.
 
 List of Interfaces:
 
 * [[I2C]]
 * [[I2S]]
 * [[PWM]]
+* [[EINT]]
 * [[FlexBus]]
 * LCD / RGB/TTL [[RGBTTL]]
 * [[SPI]]