add jtag page

[libreriscv.git] / shakti / m_class.mdwn

diff --git a/shakti/m_class.mdwn b/shakti/m_class.mdwn
index 08fb8ea08eabc423ef396f7fca4c7ed51f9954dd..c6c9c32a64bb715158435f71ed1a720a63e73cc0 100644 (file)
--- a/shakti/m_class.mdwn
+++ b/shakti/m_class.mdwn
@@ -10,6 +10,7 @@ yields.
 * See [[pinouts]] for auto-generated table of pinouts (including mux)
 * See [[peripheralschematics]] for example Reference Layouts
 * See [[ramanalysis]] for a comprehensive analysis of why DDR3 is to be used.
+* See [[todo]] for a rough list of tasks (and link to bugtracker)
 
 ## Rough specification.
 
@@ -26,6 +27,13 @@ details see
 
 [[shakti_libre_riscv.jpg]]
 
+## Die area estimates
+
+* <http://hwacha.org/papers/riscv-esscirc2014-talk.pdf>
+* 40nm 64-bit rocket single-core single-issue in-order: 0.14mm^2
+* 40nm 16-16k L1 caches, 0.25mm^2
+* <http://people.csail.mit.edu/beckmann/publications/tech.../grain_size_tr_feb_2010.pdf>
+
 ## Targetting full Libre Licensing to the bedrock.
 
 The only barrier to being able to replicate the masks from scratch
@@ -100,7 +108,7 @@ firmly a priority focus.
 * SD/MMC for external MicroSD
 * SD/MMC for on-PCB eMMC (care needed on power/boot sequence)
 * NAND Flash (not recommended), requires 8080/ATI-style Bus with dedicated CS#
-* Optional 4-wire SPI NAND/NOR for boot (XIP - Execute In-place - recommended).
+* Optional 4-wire [[QSPI]] NAND/NOR for boot (XIP - Execute In-place - recommended).
 * Audio over [[I2S]] (5-pin: 4 for output, 1 for input), fall-back to USB Audio
 * Audio also over [[AC97]]
 * Some additional SPI peripherals, e.g. connection to low-power MCU.
@@ -194,8 +202,8 @@ TBD
 
 * Plain [[GPIO]] multiplexed with a [[pinmux]] onto (nearly) all other pins
 * RGB/TTL up to 1440x900 @ 60fps, 24-bit colour
-* 2x 1-lane SPI
-* 1x 4-lane (quad) SPI
+* 2x 1-lane [[SPI]]
+* 1x 4-lane (quad) [[QSPI]]
 * 4x SD/MMC (1x 1/2/4/8-bit, 3x 1/2/4-bit)
 * 2x full UART incl. CTS/RTS
 * 3x UART (TX/RX only)
@@ -206,6 +214,7 @@ TBD
 * 1x [[I2S]] audio with 4-wire output and 1-wire input.
 * 3x USB2 (ULPI for reduced pincount) each capable of USB-OTG support
 * DDR3/DDR3L/LPDDR3 32-bit-wide memory controller
+* [[JTAG]] for debugging
 
 Some interfaces at:
 
@@ -216,11 +225,12 @@ Some interfaces at:
 * <https://github.com/sifive/freedom/blob/master/src/main/scala/everywhere/e300artydevkit/Platform.scala>
   Pinmux ("IOF") for multiplexing several I/O functions onto a single pin
 * <https://bitbucket.org/casl/c-class/src/0e77398a030bfd705930d0f1b8b9b5050d76e265/src/peripherals/?at=master>
-  including AXI, DMA, GPIO, I2C, JTAG, PLIC, QSPI, SDRAM, UART (and TCM?).  FlexBus, HyperBus and xSPI to
-  be added.
+  including AXI, DMA, GPIO, I2C, JTAG, PLIC, QSPI, SDRAM, UART (and TCM?).
+  FlexBus, HyperBus and xSPI to be added.
 
 List of Interfaces:
 
+* [[JTAG]]
 * [[I2C]]
 * [[I2S]]
 * [[PWM]]
@@ -228,9 +238,11 @@ List of Interfaces:
 * [[FlexBus]]
 * LCD / RGB/TTL [[RGBTTL]]
 * [[SPI]]
+* [[QSPI]]
 * SD/MMC and eMMC [[sdmmc]]
 * Pin Multiplexing [[pinmux]]
 * Gigabit Ethernet [[RGMII]]
+* SDRAM [[sdram]]
 
 List of Internal Interfaces: