@SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run
@SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a
@SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_124 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = \
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/libsim.a
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_124 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = sh/libsim.a
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = sh/gencode
@SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_129 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_130 = \
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_129 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_130 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = v850/libsim.a
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_133 = \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = $(v850_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_134 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_135 = $(v850_BUILD_OUTPUTS)
subdir = .
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.o rl78/trace.o
am_rl78_libsim_a_OBJECTS =
rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS)
+rx_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = \
+@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o rx/load.o rx/mem.o rx/misc.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o rx/rx.o rx/syscalls.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o rx/gdb-if.o rx/err.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o
+am_rx_libsim_a_OBJECTS =
+rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS)
+sh_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = \
+@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o $(patsubst \
+@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o sh/table.o
+am_sh_libsim_a_OBJECTS =
+sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS)
+v850_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o v850/interp.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o v850/semantics.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o v850/icache.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/modules.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o
+am_v850_libsim_a_OBJECTS =
+v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS)
@SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
@SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
$(moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \
$(or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \
$(riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \
- $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \
- $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \
- $(cr16_run_SOURCES) $(cris_run_SOURCES) \
- $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \
- $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \
+ $(rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \
+ $(v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
+ $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
+ $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
+ $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
+ $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
+ $(erc32_run_SOURCES) erc32/sis.c \
$(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
$(ft32_run_SOURCES) $(h8300_run_SOURCES) \
$(igen_filter_SOURCES) $(igen_gen_SOURCES) \
$(am__append_72) $(am__append_78) $(am__append_84) \
$(am__append_86) $(am__append_91) $(am__append_101) \
$(am__append_107) $(am__append_109) $(am__append_111) \
- $(am__append_117) $(am__append_119) $(am__append_121)
+ $(am__append_117) $(am__append_119) $(am__append_121) \
+ $(am__append_123) $(am__append_125) $(am__append_131)
BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
$(am__append_37) $(am__append_49) $(am__append_58) \
$(am__append_64) $(am__append_75) $(am__append_94) \
- $(am__append_104) $(am__append_113) $(am__append_125) \
- $(am__append_130)
+ $(am__append_104) $(am__append_113) $(am__append_127) \
+ $(am__append_133)
CLEANFILES = common/version.c common/version.c-stamp \
testsuite/common/bits-gen testsuite/common/bits32m0.c \
testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
testsuite/common/bits64m63.c
DISTCLEANFILES = $(am__append_100)
-MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
+MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
+ $(common_HW_CONFIG_H_TARGETS) $(patsubst \
%,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
$(common_GEN_MODULES_C_TARGETS) $(patsubst \
%,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
$(am__append_51) $(am__append_60) $(am__append_66) \
$(am__append_71) $(am__append_77) $(am__append_83) \
$(am__append_99) $(am__append_106) $(am__append_115) \
- $(am__append_128) $(am__append_132)
-AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
-AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
- $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
- -DSIM_COMMON_BUILD
+ $(am__append_130) $(am__append_135)
+AM_CFLAGS = \
+ $(WERROR_CFLAGS) \
+ $(WARN_CFLAGS) \
+ $(AM_CFLAGS_$(subst -,_,$(@D))) \
+ $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
+
+AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
+ -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
+ $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
+ -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
$(SIM_INLINE) -I$(srcdir)/common
COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
$(am__append_33) $(am__append_38) $(am__append_50) \
$(am__append_59) $(am__append_65) $(am__append_69) \
$(am__append_76) $(am__append_81) $(am__append_98) \
- $(am__append_105) $(am__append_114) $(am__append_126) \
- $(am__append_131)
+ $(am__append_105) $(am__append_114) $(am__append_128) \
+ $(am__append_134)
SIM_INSTALL_DATA_LOCAL_DEPS =
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
+AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
common_libcommon_a_SOURCES = \
common/callback.c \
common/portability.c \
am_arch_d = $(subst -,_,$(@D))
GEN_MODULES_C_SRCS = \
$(wildcard \
- $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
- $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
+ $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
+ $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
+ $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
LIBIBERTY_LIB = ../libiberty/libiberty.a
@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
@SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
@SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
@SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
+@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
+@SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
+@SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
+@SIM_ENABLE_ARCH_erc32_TRUE@ -DFAST_UART
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
@SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
+@SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
+@SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
+@SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
# opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
# leak detection while running it.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
+@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
+@SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_CELL_BITSIZE=32 \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_ADDRESS_BITSIZE=32 \
+@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_MSB=31
+
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
@SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
+@SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \
+@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
+@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
+
@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \
@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) $(am__append_90)
@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES =
@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
@SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
+@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES =
+@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/load.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/misc.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/rx.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/gdb-if.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o \
+@SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.o
+
@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
@SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
+@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES =
+@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \
+@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.o \
+@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o
+
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
+@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES =
+@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/interp.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.o \
+@SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o
+
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
@SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
$(AM_V_at)-rm -f rl78/libsim.a
$(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
$(AM_V_at)$(RANLIB) rl78/libsim.a
+rx/$(am__dirstamp):
+ @$(MKDIR_P) rx
+ @: > rx/$(am__dirstamp)
+
+rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
+ $(AM_V_at)-rm -f rx/libsim.a
+ $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
+ $(AM_V_at)$(RANLIB) rx/libsim.a
+sh/$(am__dirstamp):
+ @$(MKDIR_P) sh
+ @: > sh/$(am__dirstamp)
+
+sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
+ $(AM_V_at)-rm -f sh/libsim.a
+ $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
+ $(AM_V_at)$(RANLIB) sh/libsim.a
+v850/$(am__dirstamp):
+ @$(MKDIR_P) v850
+ @: > v850/$(am__dirstamp)
+
+v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
+ $(AM_V_at)-rm -f v850/libsim.a
+ $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
+ $(AM_V_at)$(RANLIB) v850/libsim.a
clean-checkPROGRAMS:
@list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
@rm -f rl78/run$(EXEEXT)
$(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
-rx/$(am__dirstamp):
- @$(MKDIR_P) rx
- @: > rx/$(am__dirstamp)
rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
@rm -f rx/run$(EXEEXT)
$(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
-sh/$(am__dirstamp):
- @$(MKDIR_P) sh
- @: > sh/$(am__dirstamp)
sh/$(DEPDIR)/$(am__dirstamp):
@$(MKDIR_P) sh/$(DEPDIR)
@: > sh/$(DEPDIR)/$(am__dirstamp)
testsuite/common/$(DEPDIR)/$(am__dirstamp)
testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
testsuite/common/$(DEPDIR)/$(am__dirstamp)
-v850/$(am__dirstamp):
- @$(MKDIR_P) v850
- @: > v850/$(am__dirstamp)
v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
@rm -f v850/run$(EXEEXT)
$(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
touch $@
.PRECIOUS: %/stamp-hw
-%/modules.c:
- $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
+%/modules.c: %/stamp-modules ; @true
+%/stamp-modules: Makefile
+ $(AM_V_GEN)set -e; \
+ LANG=C ; export LANG; \
+ LC_ALL=C ; export LC_ALL; \
+ sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
+ ( \
+ echo '/* Do not modify this file. */'; \
+ echo '/* It is created automatically by the Makefile. */'; \
+ echo '#include "libiberty.h"'; \
+ echo '#include "sim-module.h"'; \
+ sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
+ echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
+ sed -e 's:\(.*\): \1,:' $@.l-tmp; \
+ echo '};'; \
+ echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
+ ) >$@.tmp; \
+ $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
+ rm -f $@.l-tmp; \
+ touch $@
+.PRECIOUS: %/stamp-modules
# Alias for developers.
@SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
$(AM_V_at)mv $@.tmp $@
@SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
-@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
-@SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
@SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
-@SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
-@SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
@SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
-@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
-@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
-@SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
-@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
@SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
-@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
-@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
@SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
-@SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
-@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
@SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
-@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
-@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
@SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
-@SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
-@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
@SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
-@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
-@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
@SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
-@SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
-@SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
@SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
-@SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
-@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
@SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
-@SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
-@SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
@SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
-@SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
-@SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
@SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
-@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
-@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
@SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
-@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
-@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
@SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
-@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
-@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
@SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
-@SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
-@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
@SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
-@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
-@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
@SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
-@SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: mcore/%.c
-@SIM_ENABLE_ARCH_mcore_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c
@SIM_ENABLE_ARCH_mcore_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
-@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: microblaze/%.c
-@SIM_ENABLE_ARCH_microblaze_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c
@SIM_ENABLE_ARCH_microblaze_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
-@SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: mips/%.c
-@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c
@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c
@SIM_ENABLE_ARCH_rl78_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+@SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
+
+@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c
+@SIM_ENABLE_ARCH_rx_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c
+@SIM_ENABLE_ARCH_rx_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+@SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
+
+@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: sh/%.c
+@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
-@SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c
+@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
+@SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
+
+@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: v850/%.c
+@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c
+@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
@SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
-%/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
- $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
-%/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
- $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
projects / binutils-gdb.git / blobdiff