PowerPC64 .branch_lt address

[binutils-gdb.git] / sim / bfin / dv-bfin_sic.c

diff --git a/sim/bfin/dv-bfin_sic.c b/sim/bfin/dv-bfin_sic.c
index 277e4e1b0cf167f4d310b50127bf2cc8fa7c28f6..4b54a20ed357d66de319d3837efeea580f97e06b 100644 (file)
--- a/sim/bfin/dv-bfin_sic.c
+++ b/sim/bfin/dv-bfin_sic.c
@@ -1,6 +1,6 @@
 /* Blackfin System Interrupt Controller (SIC) model.
 
-   Copyright (C) 2010-2012 Free Software Foundation, Inc.
+   Copyright (C) 2010-2022 Free Software Foundation, Inc.
    Contributed by Analog Devices, Inc.
 
    This file is part of simulators.
@@ -18,7 +18,8 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-#include "config.h"
+/* This must come before any other includes.  */
+#include "defs.h"
 
 #include "sim-main.h"
 #include "devices.h"
@@ -150,13 +151,17 @@ bfin_sic_52x_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
+    return 0;
+
   if (nr_bytes == 4)
     value = dv_load_4 (source);
   else
     value = dv_load_2 (source);
 
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -204,8 +209,12 @@ bfin_sic_52x_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -256,13 +265,17 @@ bfin_sic_537_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
+    return 0;
+
   if (nr_bytes == 4)
     value = dv_load_4 (source);
   else
     value = dv_load_2 (source);
 
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -309,8 +322,12 @@ bfin_sic_537_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -362,13 +379,17 @@ bfin_sic_54x_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
+    return 0;
+
   if (nr_bytes == 4)
     value = dv_load_4 (source);
   else
     value = dv_load_2 (source);
 
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -412,8 +433,12 @@ bfin_sic_54x_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -461,13 +486,17 @@ bfin_sic_561_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
+    return 0;
+
   if (nr_bytes == 4)
     value = dv_load_4 (source);
   else
     value = dv_load_2 (source);
 
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -515,8 +544,12 @@ bfin_sic_561_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 *value32p;
   void *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - sic->base;
-  valuep = (void *)((unsigned long)sic + mmr_base() + mmr_off);
+  valuep = (void *)((uintptr_t)sic + mmr_base() + mmr_off);
   value16p = valuep;
   value32p = valuep;
 
@@ -926,7 +959,7 @@ bfin_sic_finish (struct hw *me)
       /* Initialize the SIC.  */
       sic->bf54x.imask0 = sic->bf54x.imask1 = sic->bf54x.imask2 = 0;
       sic->bf54x.isr0 = sic->bf54x.isr1 = sic->bf54x.isr2 = 0;
-      sic->bf54x.iwr0 = sic->bf54x.iwr1 = sic->bf54x.iwr1 = 0xFFFFFFFF;
+      sic->bf54x.iwr0 = sic->bf54x.iwr1 = sic->bf54x.iwr2 = 0xFFFFFFFF;
       sic->bf54x.iar0 = 0x10000000;
       sic->bf54x.iar1 = 0x33322221;
       sic->bf54x.iar2 = 0x66655444;