/* Simulator pseudo baseclass.
- Copyright (C) 1997 Free Software Foundation, Inc.
+ Copyright (C) 1997-1998 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GDB, the GNU debugger.
/* Simulator state pseudo baseclass.
- Each simulator is required to have a sim-main.h file that includes
- sim-basics.h, defines the base type sim_cia (the data type that
- contains the complete current instruction address information), and
- then sim-base.h:
+ Each simulator is required to have the file ``sim-main.h''. That
+ file includes ``sim-basics.h'', defines the base type ``sim_cia''
+ (the data type that contains complete current instruction address
+ information), include ``sim-base.h'':
#include "sim-basics.h"
typedef address_word sim_cia;
+ /-* If `sim_cia' is not an integral value (e.g. a struct), define
+ CIA_ADDR to return the integral value. *-/
+ /-* #define CIA_ADDR(cia) (...) *-/
#include "sim-base.h"
- and defines two key simulator structures. Firstly, struct
- _sim_cpu:
+ finally, two data types `struct _sim_cpu' and `struct sim_state'
+ are defined:
struct _sim_cpu {
... simulator specific members ...
sim_cpu_base base;
};
- and secondly, struct sim_state (which uses the sim_cpu structure):
-
struct sim_state {
sim_cpu cpu[MAX_NR_PROCESSORS];
#if (WITH_SMP)
#ifndef NULL_CIA
#define NULL_CIA ((sim_cia) 0)
#endif
+/* Return the current instruction address as a number.
+ Some targets treat the current instruction address as a struct
+ (e.g. for delay slot handling). */
+#ifndef CIA_ADDR
+#define CIA_ADDR(cia) (cia)
+#endif
+#ifndef INVALID_INSTRUCTION_ADDRESS
+#define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
+#endif
+
typedef struct _sim_cpu sim_cpu;
#include "sim-module.h"
+
#include "sim-trace.h"
-#include "sim-profile.h"
-#include "sim-model.h"
#include "sim-core.h"
#include "sim-events.h"
+#include "sim-profile.h"
+#ifdef SIM_HAVE_MODEL
+#include "sim-model.h"
+#endif
#include "sim-io.h"
-
+#include "sim-engine.h"
+#include "sim-watch.h"
+#include "sim-memopt.h"
+#ifdef SIM_HAVE_BREAKPOINTS
+#include "sim-break.h"
+#endif
+#include "sim-cpu.h"
/* Global pointer to current state while sim_resume is running.
On a machine with lots of registers, it might be possible to reserve
struct host_callback_struct *callback;
#define STATE_CALLBACK(sd) ((sd)->base.callback)
+ /* The type of simulation environment (user/operating). */
+ enum sim_environment environment;
+#define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
+
#if 0 /* FIXME: Not ready yet. */
/* Stuff defined in sim-config.h. */
struct sim_config config;
#endif
/* List of installed module `init' handlers. */
- MODULE_INIT_LIST *init_list;
-#define STATE_INIT_LIST(sd) ((sd)->base.init_list)
- /* List of installed module `uninstall' handlers. */
- MODULE_UNINSTALL_LIST *uninstall_list;
-#define STATE_UNINSTALL_LIST(sd) ((sd)->base.uninstall_list)
-
- /* ??? This might be more appropriate in sim_cpu. */
- /* Machine tables for this cpu. See sim-model.h. */
- const MODEL *model;
-#define STATE_MODEL(sd) ((sd)->base.model)
+ struct module_list *modules;
+#define STATE_MODULES(sd) ((sd)->base.modules)
/* Supported options. */
struct option_list *options;
int verbose_p;
#define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
+ /* Non cpu-specific trace data. See sim-trace.h. */
+ TRACE_DATA trace_data;
+#define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
+
+ /* If non NULL, the BFD architecture specified on the command line */
+ const struct bfd_arch_info *architecture;
+#define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
+
+ /* If non NULL, the bfd target specified on the command line */
+ const char *target;
+#define STATE_TARGET(sd) ((sd)->base.target)
+
/* In standalone simulator, this is the program's arguments passed
on the command line. */
char **prog_argv;
struct _bfd *prog_bfd;
#define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
+ /* Symbol table for prog_bfd */
+ struct symbol_cache_entry **prog_syms;
+#define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
+
/* The program's text section. */
struct sec *text_section;
/* Starting and ending text section addresses from the bfd. */
SIM_ADDR start_addr;
#define STATE_START_ADDR(sd) ((sd)->base.start_addr)
-#if WITH_SCACHE
/* Size of the simulator's cache, if any.
This is not the target's cache. It is the cache the simulator uses
to process instructions. */
unsigned int scache_size;
#define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
-#endif
/* FIXME: Move to top level sim_state struct (as some struct)? */
#ifdef SIM_HAVE_FLATMEM
unsigned int mem_size;
#define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
+ unsigned int mem_base;
+#define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
unsigned char *memory;
#define STATE_MEMORY(sd) ((sd)->base.memory)
#endif
#define STATE_CORE(sd) (&(sd)->base.core)
sim_core core;
+ /* Record of memory sections added via the memory-options interface. */
+#define STATE_MEMOPT(sd) ((sd)->base.memopt)
+ sim_memopt *memopt;
+
/* event handler */
#define STATE_EVENTS(sd) (&(sd)->base.events)
sim_events events;
+ /* generic halt/resume engine */
+ sim_engine engine;
+#define STATE_ENGINE(sd) (&(sd)->base.engine)
+
+ /* generic watchpoint support */
+ sim_watchpoints watchpoints;
+#define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
+
+ /* Pointer to list of breakpoints */
+ struct sim_breakpoint *breakpoints;
+#define STATE_BREAKPOINTS(sd) ((sd)->base.breakpoints)
+
+#if WITH_HW
+ struct sim_hw *hw;
+#define STATE_HW(sd) ((sd)->base.hw)
+#endif
+
+ /* Should image loads be performed using the LMA or VMA? Older
+ simulators use the VMA while newer simulators prefer the LMA. */
+ int load_at_lma_p;
+#define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
+
/* Marker for those wanting to do sanity checks.
This should remain the last member of this struct to help catch
miscompilation errors. */
int magic;
#define SIM_MAGIC_NUMBER 0x4242
#define STATE_MAGIC(sd) ((sd)->base.magic)
-
} sim_state_base;
-
-/* Pseudo baseclass for each cpu. */
-
-typedef struct {
-
- /* Backlink to main state struct. */
- SIM_DESC state;
-#define CPU_STATE(cpu) ((cpu)->base.state)
-
- /* Processor specific core data */
-#define CPU_CORE(cpu) (& (cpu)->base.core)
- sim_cpu_core core;
-
- /* Trace data. See sim-trace.h. */
- TRACE_DATA trace_data;
-#define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data)
-
- /* Maximum number of debuggable entities.
- This debugging is not intended for normal use.
- It is only enabled when the simulator is configured with --with-debug
- which shouldn't normally be specified. */
-#ifndef MAX_DEBUG_VALUES
-#define MAX_DEBUG_VALUES 4
-#endif
-
- /* Boolean array of specified debugging flags. */
- char debug_flags[MAX_DEBUG_VALUES];
-#define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags)
- /* Standard values. */
-#define DEBUG_INSN_IDX 0
-#define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */
-
- /* Debugging output goes to this or stderr if NULL.
- We can't store `stderr' here as stderr goes through a callback. */
- FILE *debug_file;
-#define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file)
-
- /* Profile data. See sim-profile.h. */
- PROFILE_DATA profile_data;
-#define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data)
-
-} sim_cpu_base;
-
-
/* Functions for allocating/freeing a sim_state. */
-SIM_DESC sim_state_alloc PARAMS ((void));
+SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback));
void sim_state_free PARAMS ((SIM_DESC));
-
#endif /* SIM_BASE_H */