Index: sim/frv/ChangeLog

[binutils-gdb.git] / sim / common / sim-fpu.c

diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
index 28d61a565fedbf06423d0f1bcd92e926fa72df9d..845248adb590e9b5619348ad511855c15535a69c 100644 (file)
--- a/sim/common/sim-fpu.c
+++ b/sim/common/sim-fpu.c
@@ -2,7 +2,7 @@
    of the floating point routines in libgcc1.c for targets without
    hardware floating point.  */
 
-/* Copyright (C) 1994,1997-1998 Free Software Foundation, Inc.
+/* Copyright 1994, 1997, 1998, 2003 Free Software Foundation, Inc.
 
 This file is free software; you can redistribute it and/or modify it
 under the terms of the GNU General Public License as published by the
@@ -1754,33 +1754,7 @@ INLINE_SIM_FPU (int)
 sim_fpu_inv (sim_fpu *f,
             const sim_fpu *r)
 {
-  if (sim_fpu_is_snan (r))
-    {
-      *f = *r;
-      f->class = sim_fpu_class_qnan;
-      return sim_fpu_status_invalid_snan;
-    }
-  if (sim_fpu_is_qnan (r))
-    {
-      *f = *r;
-      f->class = sim_fpu_class_qnan;
-      return 0;
-    }
-  if (sim_fpu_is_infinity (r))
-    {
-      *f = sim_fpu_zero;
-      f->sign = r->sign;
-      return 0;
-    }
-  if (sim_fpu_is_zero (r))
-    {
-      f->class = sim_fpu_class_infinity;
-      f->sign = r->sign;
-      return sim_fpu_status_invalid_div0;
-    }
-  *f = *r;
-  f->normal_exp = - r->normal_exp;
-  return 0;
+  return sim_fpu_div (f, &sim_fpu_one, r);
 }
 
 
@@ -2214,6 +2188,22 @@ sim_fpu_exp (const sim_fpu *d)
 }
 
 
+INLINE_SIM_FPU (unsigned64)
+sim_fpu_fraction (const sim_fpu *d)
+{
+  return d->fraction;
+}
+
+
+INLINE_SIM_FPU (unsigned64)
+sim_fpu_guard (const sim_fpu *d, int is_double)
+{
+  unsigned64 rv;
+  unsigned64 guardmask = LSMASK64 (NR_GUARDS - 1, 0);
+  rv = (d->fraction & guardmask) >> NR_PAD;
+  return rv;
+}
+
 
 INLINE_SIM_FPU (int)
 sim_fpu_is (const sim_fpu *d)