/* Lattice Mico32 CPU model.
Contributed by Jon Beniston <jon@beniston.com>
- Copyright (C) 2009-2015 Free Software Foundation, Inc.
+ Copyright (C) 2009-2021 Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
+/* This must come before any other includes. */
+#include "defs.h"
+
#include "hw-main.h"
#include "sim-main.h"
struct lm32cpu *controller = hw_data (me);
SIM_DESC sd = hw_system (me);
sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
- address_word cia = CIA_GET (cpu);
+ address_word cia = CPU_PC_GET (cpu);
int interrupt = (int) data;
struct lm32cpu *controller = hw_data (me);
SIM_DESC sd = hw_system (me);
sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
- address_word cia = CIA_GET (cpu);
+ address_word cia = CPU_PC_GET (cpu);
HW_TRACE ((me, "interrupt event on port %d, level %d", my_port, level));