return (addr + 65536) & ~(0xffffUL);
}
+extern const SIM_MACH * const lm32_sim_machs[];
+
/* Create an instance of the simulator. */
SIM_DESC
unsigned long base, limit;
/* Set default options before parsing user options. */
+ STATE_MACHS (sd) = lm32_sim_machs;
+ STATE_MODEL_NAME (sd) = "lm32";
current_alignment = STRICT_ALIGNMENT;
+ current_target_byte_order = BFD_ENDIAN_BIG;
/* The cpu data is kept in a separately allocated chunk of memory. */
if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
free_state (sd);
return 0;
}
- /*sim_io_printf (sd, "Allocating memory at 0x%x size 0x%x\n", base, limit); */
- sim_do_commandf (sd, "memory region 0x%x,0x%x", base, limit);
+ /*sim_io_printf (sd, "Allocating memory at 0x%lx size 0x%lx\n", base, limit); */
+ sim_do_commandf (sd, "memory region 0x%lx,0x%lx", base, limit);
}
}