[aarch64] Remove handling of ADR/ADRP from prologue analyzer

[binutils-gdb.git] / sim / m32r / sim-main.h

diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
index cd39e98c021d0896d3ac809a12675eeeee18e203..2ce989a897a1a8fd339cae5040279e3841cc0b77 100644 (file)
--- a/sim/m32r/sim-main.h
+++ b/sim/m32r/sim-main.h
@@ -3,6 +3,11 @@
 #ifndef SIM_MAIN_H
 #define SIM_MAIN_H
 
+/* This is a global setting.  Different cpu families can't mix-n-match -scache
+   and -pbb.  However some cpu families may use -simple while others use
+   one of -scache/-pbb.  */
+#define WITH_SCACHE_PBB 1
+
 #include "symcat.h"
 #include "sim-basics.h"
 #include "cgen-types.h"
@@ -43,16 +48,6 @@ struct _sim_cpu {
 #endif
 };
 \f
-/* The sim_state struct.  */
-
-struct sim_state {
-  sim_cpu *cpu[MAX_NR_PROCESSORS];
-
-  CGEN_STATE cgen_state;
-
-  sim_state_base base;
-};
-\f
 /* Misc.  */
 
 /* Catch address exceptions.  */
@@ -61,11 +56,4 @@ extern SIM_CORE_SIGNAL_FN m32r_core_signal;
 m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
                  (TRANSFER), (ERROR))
 
-/* Default memory size.  */
-#ifdef M32R_LINUX
-#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
-#else
-#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
-#endif
-
 #endif /* SIM_MAIN_H */