+Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (trace_output): Add result argument.
+ (trace_result): New function. Simpler version of trace_output,
+ assumes trace needed.
+ (trace_output): Call trace_result.
+ (trace_output): For IMM_REG_REG, trace correct register.
+ (trace_input): Add case for 16bit immediates.
+ (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
+
+ * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
+ (trace_values, trace_name, trace_pc, trace_num_values): Make
+ global.
+ (GR, SR): Define.
+
+ v850.insn (movea, stsr): Use.
+start-sanitize-v850e
+ (sxb, sxh, zxb, zxh): Ditto.
+end-sanitize-v850e
+
+Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c: Move "movea" from here.
+ * v850.igen: To here.
+
+ * v850.igen (simm16): Define, sign extend imm16.
+ (uimm16): Define, no sign extension.
+ (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
+
+start-sanitize-v850e
+ * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
+ "mov32" from here.
+ * v850.igen: To here.
+ (switch): Fix off by two error in NIA calc.
+
+end-sanitize-v850e
+Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (trace_pc, trace_name, trace_values, trace_num_values):
+ New static globals.
+ (trace_input): Just save pc, name and values for trace_output.
+ (trace_output): Write trace values to a buffer. Use
+ trace_one_insn to print trace info and buffer.
+ (SIZE_OPERANDS, SIZE_LOCATION): Delete.
+
+Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
+ can be masked out.
+
+ * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr"
+ instructions from here.
+ * v850.igen (ldsr, stsr): To here. Mask out reserved bits when
+ setting PSW.
+
+ * interp.c (sim_open): Set psw_mask if machine known.
+
+Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+start-sanitize-v850e
+ * v850-dc: Add rule to diferentiate between breakpoint and divh.
+ * v850.igen (break): New instruction, breakpoint simulator.
+
+end-sanitize-v850e
+ * v850.igen (breakpoint): Enable. Change to a 32bit instruction.
+
+start-sanitize-v850e
+Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
+
+ * simops.c (Multiply64): Don't store into register zero.
+
+start-sanitize-v850e
+Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Makefile.in (semantics.o): Add dependency.
+
+ * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save,
+ do not adjust CIA/NIA.
+
+Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+start-sanitize-v850eq
+ * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
+
+ * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
+ "divun", "pushml" code from here to v850.igen.
+ (divun): Make global.
+ (type3_regs): Make global
+
+ * v850.igen: Move simops.c code to here.
+
+ * interp.c (sim_create_inferior): For v850eq set US bit by
+ default.
+
+end-sanitize-v850eq
+start-sanitize-v850e
+ * interp.c (sim_open): Don't set arch, now set by
+ sim_analyze_program.
+
+end-sanitize-v850e
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (op_types): Move from here.
+ sim-main.h: To here.
+
+ * sim-main.h (trace_input, trace_output), simops.c: Make global.
+
+ * simops.c (OP_60): Move "jmp" code from here.
+ * v850.igen (jmp): To here.
+
+start-sanitize-v850eq
+ * simops.c (OP_60): Move "sld.bu" code from here.
+ * v850.igen (sld.bu): To here.
+
+end-sanitize-v850eq
+Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+start-sanitize-v850eq
+ * v850.igen (prepare, ...): Add to v850eq architecture.
+
+end-sanitize-v850eq
+start-sanitize-v850e
+ * interp.c (sim_open): Default to v850eq.
+
+end-sanitize-v850e
+start-sanitize-v850eq
+
+ * interp.c (sim_open): Default to v850e.
+end-sanitize-v850eq
+ * sim-main.h (signal.h): Include.
+
+ * v850.igen (illegal): Report/halt illegal instructions.
+
+ * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS.
+
+ * configure.in: Add reserved bits option.
+ * configure: Regenerate.
+
+Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_open): Use sim_do_commandf instead of asprintf.
+
+ * sim-main.h (INSN_NAME):
+
+ * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
+ (SIM_EXTRA_DEPS): Add itable.h
+ (tmp-gencode): Does not depend on simops.h
+
+ * sim-main.h (itable.h): Include.
+ (MAX_INSNS, INSN_NAME): Define.
+
+ * interp.c: Compute inttype from the interrupt_names index that
+ was passed in.
+
Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_input): Use trace_printf instead of
projects / binutils-gdb.git / blobdiff