Clean up tracing for Bcond & jmp insns.

[binutils-gdb.git] / sim / v850 / sim-main.h

diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
index 44a5669a4d4278fc21bc79c6ef959307a10efbd2..5f088898ef19984539bfad0d22ffe68a896a6d0e 100644 (file)
--- a/sim/v850/sim-main.h
+++ b/sim/v850/sim-main.h
@@ -41,7 +41,6 @@ typedef struct _v850_regs {
   reg_t sregs[32];             /* system registers, including psw */
   reg_t pc;
   int dummy_mem;               /* where invalid accesses go */
-  int pending_nmi;
 } v850_regs;
 
 struct _sim_cpu
@@ -49,6 +48,7 @@ struct _sim_cpu
   /* ... simulator specific members ... */
   v850_regs reg;
   reg_t psw_mask;               /* only allow non-reserved bits to be set */
+  sim_event *pending_nmi;
   /* ... base type ... */
   sim_cpu_base base;
 };
@@ -224,6 +224,10 @@ sim_core_write_unaligned_##LEN (STATE_CPU (simulator, 0), \
                                PC, sim_core_write_map, (ADDR), (DATA))
 
 
+/* compare cccc field against PSW */
+int condition_met (unsigned code);
+
+
 /* Debug/tracing calls */
 
 enum op_types
@@ -310,6 +314,19 @@ do { \
   } \
 } while (0)
 
+#define TRACE_ALU_INPUT3(IN0, IN1, IN2) \
+do { \
+  if (TRACE_ALU_P (CPU)) { \
+    trace_module = "alu"; \
+    trace_pc = cia; \
+    trace_name = itable[MY_INDEX].name; \
+    trace_values[0] = (IN0); \
+    trace_values[1] = (IN1); \
+    trace_values[2] = (IN2); \
+    trace_num_values = 3; \
+  } \
+} while (0)
+
 #define TRACE_ALU_RESULT(RESULT) \
 do { \
   if (TRACE_ALU_P (CPU)) { \
@@ -317,6 +334,17 @@ do { \
   } \
 } while (0)
 
+#define TRACE_BRANCH0() \
+do { \
+  if (TRACE_BRANCH_P (CPU)) { \
+    trace_module = "branch"; \
+    trace_pc = cia; \
+    trace_name = itable[MY_INDEX].name; \
+    trace_num_values = 0; \
+    trace_result (1, (nia)); \
+  } \
+} while (0)
+
 #define TRACE_BRANCH1(IN1) \
 do { \
   if (TRACE_BRANCH_P (CPU)) { \
@@ -356,6 +384,43 @@ do { \
   } \
 } while (0)
 
+#define TRACE_LD(ADDR,RESULT) \
+do { \
+  if (TRACE_MEMORY_P (CPU)) { \
+    trace_module = "memory"; \
+    trace_pc = cia; \
+    trace_name = itable[MY_INDEX].name; \
+    trace_values[0] = (ADDR); \
+    trace_num_values = 1; \
+    trace_result (1, (RESULT)); \
+  } \
+} while (0)
+
+/* start-sanitize-v850e */
+#define TRACE_LD_NAME(NAME, ADDR,RESULT) \
+do { \
+  if (TRACE_MEMORY_P (CPU)) { \
+    trace_module = "memory"; \
+    trace_pc = cia; \
+    trace_name = (NAME); \
+    trace_values[0] = (ADDR); \
+    trace_num_values = 1; \
+    trace_result (1, (RESULT)); \
+  } \
+} while (0)
+
+/* end-sanitize-v850e */
+#define TRACE_ST(ADDR,RESULT) \
+do { \
+  if (TRACE_MEMORY_P (CPU)) { \
+    trace_module = "memory"; \
+    trace_pc = cia; \
+    trace_name = itable[MY_INDEX].name; \
+    trace_values[0] = (ADDR); \
+    trace_num_values = 1; \
+    trace_result (1, (RESULT)); \
+  } \
+} while (0)
 
 #else
 #define trace_input(NAME, IN1, IN2)
@@ -363,13 +428,20 @@ do { \
 #define trace_result(HAS_RESULT, RESULT)
 
 #define TRACE_ALU_INPUT0()
-#define TRACE_ALU_INPUT1(IN1)
-#define TRACE_ALU_INPUT2(IN1, IN2)
+#define TRACE_ALU_INPUT1(IN0)
+#define TRACE_ALU_INPUT2(IN0, IN1)
+#define TRACE_ALU_INPUT2(IN0, IN1)
+#define TRACE_ALU_INPUT2(IN0, IN1 INS2)
 #define TRACE_ALU_RESULT(RESULT)
 
+#define TRACE_BRANCH0()
 #define TRACE_BRANCH1(IN1)
 #define TRACE_BRANCH2(IN1, IN2)
 #define TRACE_BRANCH2(IN1, IN2, IN3)
+
+#define TRACE_LD(ADDR,RESULT)
+#define TRACE_ST(ADDR,RESULT)
+
 #endif