(no commit message)

[libreriscv.git] / simple_v_extension / appendix.mdwn

diff --git a/simple_v_extension/appendix.mdwn b/simple_v_extension/appendix.mdwn
index 3c07311f4bc9d1242c11b17a9c208c452acada99..d4a69b3529a925f146827c1de1449e46abd8cb65 100644 (file)
--- a/simple_v_extension/appendix.mdwn
+++ b/simple_v_extension/appendix.mdwn
@@ -1,3 +1,5 @@
+[[!tag standards]]
+
 # Simple-V (Parallelism Extension Proposal) Appendix
 
 * Copyright (C) 2017, 2018, 2019 Luke Kenneth Casson Leighton
@@ -234,6 +236,13 @@ element tests must be performed (and the result optionally stored in
 the result mask), with a "post-analysis" phase carried out which checks
 whether to branch.
 
+Note also that whilst it may seem excessive to have all four (because
+conditional comparisons may be inverted by swapping src1 and src2),
+data-dependent fail-on-first is *not* invertible and *only* terminates
+on first zero-condition encountered.  Additionally it may be inconvenient
+to have to swap the predicate registers associated with src1 and src2,
+because this involves a new VBLOCK Context.
+
 ### Standard Branch <a name="standard_branch"></a>
 
 Branch operations use standard RV opcodes that are reinterpreted to