sync_up: Added Dmitry, Sadoon

[libreriscv.git] / simple_v_extension / bigint_example.mdwn

diff --git a/simple_v_extension/bigint_example.mdwn b/simple_v_extension/bigint_example.mdwn
index 8b153bf312bd8cff78922243d5b6ea218d9fdadf..17133bd1fc805f9a179c00399660c7e9fca3b94d 100644 (file)
--- a/simple_v_extension/bigint_example.mdwn
+++ b/simple_v_extension/bigint_example.mdwn
@@ -14,6 +14,7 @@
     VBLK.pred.t1 = {inv, t0}
     VBLK.pred.t4 = {t0}
     VBLK.reg.t4 = {vec}
+    VBLK.VL = 8
     {
      cont:
      c.slli t0, 1 # shifts up carry by 1