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[libreriscv.git] / simple_v_extension / vblock_format.mdwn

diff --git a/simple_v_extension/vblock_format.mdwn b/simple_v_extension/vblock_format.mdwn
index 413dcd5dce3adbdd6fc38cbba40aa926fa059619..7a9c3f0a4a2ec042e001af9d50a969fb944ba9d3 100644 (file)
--- a/simple_v_extension/vblock_format.mdwn
+++ b/simple_v_extension/vblock_format.mdwn
@@ -1,3 +1,5 @@
+[[!tag standards]]
+
 # Simple-V (Parallelism Extension Proposal) Vector Block Format
 
 * Copyright (C) 2017, 2018, 2019 Luke Kenneth Casson Leighton
@@ -151,6 +153,39 @@ The swizzle table format is included here for convenience:
 
 Swizzle blocks are only accessible using the "VBLOCK2" format.
 
+# REMAP Area Format<a name="remap_format"></a>
+
+REMAP is an algorithmic version of in-place vector "vgather" or "swizzle".
+
+The REMAP area is divided into two areas:
+
+* Register-to-SHAPE.  This defines which registers have which shapes.
+  Each entry is 8-bits in length.
+* SHAPE Table entries.  These are 32-bits in length and are aligned
+  to (start on) a 16 bit boundary.
+
+REMAP Table Entries:
+
+| 7:5      | 4:0    |
+| -------- | ------ |
+| shapeidx | regnum |
+
+When both shapeidx and regnum are zero, this indicates the end of the
+REMAP Register-to-SHAPE section.  The REMAP Table section size is then
+aligned to a 16-bit boundary.  32-bit SHAPE Table Entries then fill the
+remainder of the REMAP area, and are indexed in order by shapeidx.
+
+In this way, multiple registers may share the same "shape" characteristics.
+
+# SHAPE Table Format<a name="shape_format"></a>
+
+The shape table format is included here for convenience. See [[simple_v_extension/remap]] for full details on how SHAPE applies,
+including pseudo-code.
+
+[[!inline raw="yes" pages="simple_v_extension/shape_table_format" ]]
+
+REMAP Shape blocks are only accessible using the "VBLOCK2" format.
+
 # CSRs:
 
 The CSRs needed, in addition to those from the main [[specification]] are: