update to rst table format

[libreriscv.git] / simple_v_extension / vblock_format.mdwn

diff --git a/simple_v_extension/vblock_format.mdwn b/simple_v_extension/vblock_format.mdwn
index 3636c46d026bfa9a71f7a49ec6eb78dca87f2d5c..afe7fe55934151ab059962b28bf55f0495319612 100644 (file)
--- a/simple_v_extension/vblock_format.mdwn
+++ b/simple_v_extension/vblock_format.mdwn
@@ -165,8 +165,10 @@ To support this option (where more complex implementations may skip some of thes
 
 The format is as follows:
 
+| 31:30  | 29    | 28:26 | 25:24 | 23:22 | 21   | 20:5  | 4:0   |
+|--------|-------|-------|-------|-------|------|-------|-------|
 | status | vlset | 16xil | pplen | rplen | mode | vlblk | opptr |
-| 2 | 1 | 3 | 2 | 2 | 1 | 16 | 5 |
+| 2      | 1     | 3     | 2     | 2     | 1    | 16    | 5     |
 
 * status is the key field that effectively exposes the inner FSM (Finite State Machine) directly.
 * status = 0b00 indicates that the processor is not in "VBLOCK Mode". It is instead in standard RV Scalar opcode execution mode. The processor will leave this mode only after it encounters the beginning of a valid VBLOCK opcode.
@@ -195,8 +197,8 @@ ECALL, on the other hand, which will cause a trap that saves and restores the fu
 
 Prohibited instructions will cause an illegal instruction trap. If at that point, software is capable of then working out how to emulate a branch or function call successfully, by manipulating (x)ePCVBLK and other state, it is not prohibited from doing so.
 
-A normal jump, normal branch and a normal function call may only be taken
-by letting the VBLOCK group end, returning to "normal" standard RV mode,
+To reiterate: a normal jump, normal conditional branch and a normal function call may only be taken
+by letting the VBLOCK group finish, returning to "normal" standard RV mode,
 and then using standard RVC, 32 bit or P48/64-\*-type opcodes.
 
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