Moved the tsunami devices into the dev/alpha directory. Other devices "generic" devic...

[gem5.git] / src / SConscript

diff --git a/src/SConscript b/src/SConscript
index 645d07e5d61924ee3c39995bfe7ce250b85bccf1..b383f58d69502076211ed993aa5785e42af0e6c7 100644 (file)
--- a/src/SConscript
+++ b/src/SConscript
@@ -47,6 +47,7 @@ Import('env')
 # Base sources used by all configurations.
 
 base_sources = Split('''
+       base/annotate.cc
        base/circlebuf.cc
        base/cprintf.cc
        base/fast_alloc.cc
@@ -62,7 +63,6 @@ base_sources = Split('''
        base/range.cc
        base/random.cc
        base/sat_counter.cc
-        base/serializer.cc
        base/socket.cc
        base/statistics.cc
        base/str.cc
@@ -81,32 +81,60 @@ base_sources = Split('''
        base/stats/visit.cc
        base/stats/text.cc
 
+        cpu/activity.cc
        cpu/base.cc
-       cpu/cpu_exec_context.cc
        cpu/cpuevent.cc
        cpu/exetrace.cc
+        cpu/func_unit.cc
         cpu/op_class.cc
        cpu/pc_event.cc
+        cpu/quiesce_event.cc
        cpu/static_inst.cc
-        cpu/sampler/sampler.cc
-    
+        cpu/simple_thread.cc
+        cpu/thread_state.cc
+
         mem/bridge.cc
         mem/bus.cc
-        mem/connector.cc
+        mem/dram.cc
         mem/mem_object.cc
         mem/packet.cc
         mem/physical.cc
         mem/port.cc
+        mem/tport.cc
+
+        mem/cache/base_cache.cc
+        mem/cache/cache.cc
+        mem/cache/coherence/coherence_protocol.cc
+        mem/cache/coherence/uni_coherence.cc
+        mem/cache/miss/blocking_buffer.cc
+        mem/cache/miss/miss_queue.cc
+        mem/cache/miss/mshr.cc
+        mem/cache/miss/mshr_queue.cc
+        mem/cache/prefetch/base_prefetcher.cc
+        mem/cache/prefetch/ghb_prefetcher.cc
+        mem/cache/prefetch/prefetcher.cc
+        mem/cache/prefetch/stride_prefetcher.cc
+        mem/cache/prefetch/tagged_prefetcher.cc
+        mem/cache/tags/base_tags.cc
+        mem/cache/tags/cache_tags.cc
+        mem/cache/tags/fa_lru.cc
+        mem/cache/tags/iic.cc
+        mem/cache/tags/lru.cc
+        mem/cache/tags/repl/gen.cc
+        mem/cache/tags/repl/repl.cc
+        mem/cache/tags/split.cc
+        mem/cache/tags/split_lifo.cc
+        mem/cache/tags/split_lru.cc
+
+        mem/cache/cache_builder.cc
 
        sim/builder.cc
-       sim/configfile.cc
        sim/debug.cc
        sim/eventq.cc
        sim/faults.cc
        sim/main.cc
-        python/swig/main_wrap.cc
+        python/swig/cc_main_wrap.cc
        sim/param.cc
-       sim/profile.cc
        sim/root.cc
        sim/serialize.cc
        sim/sim_events.cc
@@ -183,38 +211,9 @@ full_system_sources = Split('''
        cpu/intr_control.cc
         cpu/profile.cc
 
-       dev/alpha_console.cc
-       dev/baddev.cc
-       dev/disk_image.cc
-       dev/etherbus.cc
-       dev/etherdump.cc
-       dev/etherint.cc
-       dev/etherlink.cc
-       dev/etherpkt.cc
-       dev/ethertap.cc 
-        dev/ide_ctrl.cc
-       dev/ide_disk.cc
-       dev/io_device.cc
-       dev/isa_fake.cc
-       dev/ns_gige.cc
-       dev/pciconfigall.cc
-       dev/pcidev.cc
-       dev/pcifake.cc
-       dev/pktfifo.cc
-       dev/platform.cc
-        dev/simconsole.cc
-       dev/simple_disk.cc
-       dev/sinic.cc
-       dev/tsunami.cc
-       dev/tsunami_cchip.cc
-       dev/tsunami_io.cc
-       dev/tsunami_fake.cc
-       dev/tsunami_pchip.cc
-
        dev/uart.cc
        dev/uart8250.cc
 
-       kern/kernel_binning.cc
        kern/kernel_stats.cc
        kern/system_events.cc
        kern/linux/events.cc
@@ -225,7 +224,8 @@ full_system_sources = Split('''
 
        sim/pseudo_inst.cc
         ''')
-
+       #dev/sinic.cc
+        #dev/i8254xGBe.cc
 
 if env['TARGET_ISA'] == 'alpha':
     full_system_sources += Split('''
@@ -274,7 +274,7 @@ alpha_eio_sources = Split('''
        encumbered/eio/eio.cc
         ''')
 
-if env['TARGET_ISA'] == 'ALPHA_ISA':
+if env['TARGET_ISA'] == 'alpha':
     syscall_emulation_sources += alpha_eio_sources
     
 memtest_sources = Split('''
@@ -290,9 +290,12 @@ env.Append(CPPPATH=Dir('.'))
 # Add a flag defining what THE_ISA should be for all compilation
 env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())])
 
-arch_sources = SConscript('arch/SConscript', exports = 'env')
+arch_sources = SConscript(os.path.join('arch', 'SConscript'), exports = 'env')
+
+cpu_sources = SConscript(os.path.join('cpu', 'SConscript'), exports = 'env')
 
-cpu_sources = SConscript('cpu/SConscript', exports = 'env')
+dev_sources = SConscript(os.path.join('dev', 'SConscript'), exports = 'env')
+full_system_sources += dev_sources
 
 # This is outside of cpu/SConscript since the source directory isn't
 # underneath 'cpu'.