Remove mem parameter. Should have been removed earlier.
[gem5.git] / src / SConscript
index 097acfe13a8f815741c74e5918b10ae5f448f1db..d938d533fa66ede3c3e312b5b3b71145000cff97 100644 (file)
@@ -25,6 +25,8 @@
 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
 
 import os
 import sys
@@ -45,6 +47,7 @@ Import('env')
 # Base sources used by all configurations.
 
 base_sources = Split('''
+       base/annotate.cc
        base/circlebuf.cc
        base/cprintf.cc
        base/fast_alloc.cc
@@ -60,7 +63,6 @@ base_sources = Split('''
        base/range.cc
        base/random.cc
        base/sat_counter.cc
-        base/serializer.cc
        base/socket.cc
        base/statistics.cc
        base/str.cc
@@ -79,36 +81,63 @@ base_sources = Split('''
        base/stats/visit.cc
        base/stats/text.cc
 
+        cpu/activity.cc
        cpu/base.cc
-       cpu/cpu_exec_context.cc
        cpu/cpuevent.cc
        cpu/exetrace.cc
+        cpu/func_unit.cc
         cpu/op_class.cc
        cpu/pc_event.cc
+        cpu/quiesce_event.cc
        cpu/static_inst.cc
-        cpu/sampler/sampler.cc
-    
+        cpu/simple_thread.cc
+        cpu/thread_state.cc
+
         mem/bridge.cc
         mem/bus.cc
-        mem/connector.cc
+        mem/dram.cc
         mem/mem_object.cc
         mem/packet.cc
         mem/physical.cc
         mem/port.cc
-        mem/request.cc
+        mem/tport.cc
+
+        mem/cache/base_cache.cc
+        mem/cache/cache.cc
+        mem/cache/coherence/coherence_protocol.cc
+        mem/cache/coherence/uni_coherence.cc
+        mem/cache/miss/blocking_buffer.cc
+        mem/cache/miss/miss_queue.cc
+        mem/cache/miss/mshr.cc
+        mem/cache/miss/mshr_queue.cc
+        mem/cache/prefetch/base_prefetcher.cc
+        mem/cache/prefetch/ghb_prefetcher.cc
+        mem/cache/prefetch/prefetcher.cc
+        mem/cache/prefetch/stride_prefetcher.cc
+        mem/cache/prefetch/tagged_prefetcher.cc
+        mem/cache/tags/base_tags.cc
+        mem/cache/tags/cache_tags.cc
+        mem/cache/tags/fa_lru.cc
+        mem/cache/tags/iic.cc
+        mem/cache/tags/lru.cc
+        mem/cache/tags/repl/gen.cc
+        mem/cache/tags/repl/repl.cc
+        mem/cache/tags/split.cc
+        mem/cache/tags/split_lifo.cc
+        mem/cache/tags/split_lru.cc
+
+        mem/cache/cache_builder.cc
 
        sim/builder.cc
-       sim/configfile.cc
        sim/debug.cc
        sim/eventq.cc
        sim/faults.cc
        sim/main.cc
+        python/swig/cc_main_wrap.cc
        sim/param.cc
-       sim/profile.cc
        sim/root.cc
        sim/serialize.cc
        sim/sim_events.cc
-       sim/sim_exit.cc
        sim/sim_object.cc
        sim/startup.cc
        sim/stat_context.cc
@@ -198,22 +227,18 @@ full_system_sources = Split('''
        dev/ns_gige.cc
        dev/pciconfigall.cc
        dev/pcidev.cc
-       dev/pcifake.cc
        dev/pktfifo.cc
        dev/platform.cc
         dev/simconsole.cc
        dev/simple_disk.cc
-       dev/sinic.cc
        dev/tsunami.cc
        dev/tsunami_cchip.cc
        dev/tsunami_io.cc
-       dev/tsunami_fake.cc
        dev/tsunami_pchip.cc
 
        dev/uart.cc
        dev/uart8250.cc
 
-       kern/kernel_binning.cc
        kern/kernel_stats.cc
        kern/system_events.cc
        kern/linux/events.cc
@@ -224,6 +249,8 @@ full_system_sources = Split('''
 
        sim/pseudo_inst.cc
         ''')
+       #dev/sinic.cc
+        #dev/i8254xGBe.cc
 
 
 if env['TARGET_ISA'] == 'alpha':
@@ -273,21 +300,25 @@ alpha_eio_sources = Split('''
        encumbered/eio/eio.cc
         ''')
 
-if env['TARGET_ISA'] == 'ALPHA_ISA':
+if env['TARGET_ISA'] == 'alpha':
     syscall_emulation_sources += alpha_eio_sources
     
 memtest_sources = Split('''
        cpu/memtest/memtest.cc
         ''')
 
+# Include file paths are rooted in this directory.  SCons will
+# automatically expand '.' to refer to both the source directory and
+# the corresponding build directory to pick up generated include
+# files.
+env.Append(CPPPATH=Dir('.'))
+
 # Add a flag defining what THE_ISA should be for all compilation
 env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())])
 
-arch_sources = SConscript('arch/SConscript',
-                          exports = 'env', duplicate = False)
+arch_sources = SConscript('arch/SConscript', exports = 'env')
 
-cpu_sources = SConscript('cpu/SConscript',
-                         exports = 'env', duplicate = False)
+cpu_sources = SConscript('cpu/SConscript', exports = 'env')
 
 # This is outside of cpu/SConscript since the source directory isn't
 # underneath 'cpu'.
@@ -322,7 +353,7 @@ env.Command(Split('base/traceflags.hh base/traceflags.cc'),
             'base/traceflags.py',
             'python $SOURCE $TARGET.base')
 
-SConscript('python/SConscript', exports = ['env'], duplicate=0)
+SConscript('python/SConscript', exports = ['env'])
 
 # This function adds the specified sources to the given build
 # environment, and returns a list of all the corresponding SCons
@@ -345,12 +376,6 @@ def make_objs(sources, env):
 #
 ###################################################
 
-# Include file paths are rooted in this directory.  SCons will
-# automatically expand '.' to refer to both the source directory and
-# the corresponding build directory to pick up generated include
-# files.
-env.Append(CPPPATH='.')
-
 # List of constructed environments to pass back to SConstruct
 envList = []