ac/surface/gfx9: let addrlib choose the preferred swizzle kind

[mesa.git] / src / amd / addrlib / r800 / siaddrlib.cpp

diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index ffa5488662b3b11f92304c356da94a5c0ee2671a..bc009f5aff066d9410a68a722bf859e46009a938 100644 (file)
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -32,16 +32,9 @@
 */
 
 #include "siaddrlib.h"
-
 #include "si_gb_reg.h"
 
-#include "si_ci_vi_merged_enum.h"
-
-#if BRAHMA_BUILD
-#include "amdgpu_id.h"
-#else
-#include "si_id.h"
-#endif
+#include "amdgpu_asic_addr.h"
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -618,6 +611,29 @@ ADDR_E_RETURNCODE SiLib::ComputePipeEquation(
             break;
     }
 
+    if (m_settings.isVegaM && (pEquation->numBits == 4))
+    {
+        ADDR_CHANNEL_SETTING addeMsb = pAddr[0];
+        ADDR_CHANNEL_SETTING xor1Msb = pXor1[0];
+        ADDR_CHANNEL_SETTING xor2Msb = pXor2[0];
+
+        pAddr[0] = pAddr[1];
+        pXor1[0] = pXor1[1];
+        pXor2[0] = pXor2[1];
+
+        pAddr[1] = pAddr[2];
+        pXor1[1] = pXor1[2];
+        pXor2[1] = pXor2[2];
+
+        pAddr[2] = pAddr[3];
+        pXor1[2] = pXor1[3];
+        pXor2[2] = pXor2[3];
+
+        pAddr[3] = addeMsb;
+        pXor1[3] = xor1Msb;
+        pXor2[3] = xor2Msb;
+    }
+
     for (UINT_32 i = 0; i < pEquation->numBits; i++)
     {
         if (pAddr[i].value == 0)
@@ -761,6 +777,16 @@ UINT_32 SiLib::ComputePipeFromCoord(
             ADDR_UNHANDLED_CASE();
             break;
     }
+
+    if (m_settings.isVegaM && (numPipes == 16))
+    {
+        UINT_32 pipeMsb = pipeBit0;
+        pipeBit0 = pipeBit1;
+        pipeBit1 = pipeBit2;
+        pipeBit2 = pipeBit3;
+        pipeBit3 = pipeMsb;
+    }
+
     pipe = pipeBit0 | (pipeBit1 << 1) | (pipeBit2 << 2) | (pipeBit3 << 3);
 
     UINT_32 microTileThickness = Thickness(tileMode);
@@ -2664,7 +2690,8 @@ ADDR_E_RETURNCODE SiLib::HwlComputeSurfaceInfo(
 
         if ((pIn->numSlices > 1) &&
             (IsMacroTiled(pOut->tileMode) == TRUE) &&
-            (m_chipFamily == ADDR_CHIP_FAMILY_SI))
+            ((m_chipFamily == ADDR_CHIP_FAMILY_SI) ||
+             (IsPrtTileMode(pOut->tileMode) == FALSE)))
         {
             pOut->equationIndex = ADDR_INVALID_EQUATION_INDEX;
         }
@@ -2822,8 +2849,8 @@ VOID SiLib::HwlCheckLastMacroTiledLvl(
 ****************************************************************************************************
 */
 AddrTileMode SiLib::HwlDegradeThickTileMode(
-    AddrTileMode        baseTileMode,   ///< [in] base tile mode
-    UINT_32             numSlices,      ///< [in] current number of slices
+    AddrTileMode        baseTileMode,   ///< base tile mode
+    UINT_32             numSlices,      ///< current number of slices
     UINT_32*            pBytesPerTile   ///< [in,out] pointer to bytes per slice
     ) const
 {
@@ -2963,9 +2990,9 @@ INT_32 SiLib::HwlPostCheckTileIndex(
 ****************************************************************************************************
 */
 ADDR_E_RETURNCODE SiLib::HwlSetupTileCfg(
-    UINT_32         bpp,            ///< [in] Bits per pixel
-    INT_32          index,          ///< [in] Tile index
-    INT_32          macroModeIndex, ///< [in] Index in macro tile mode table(CI)
+    UINT_32         bpp,            ///< Bits per pixel
+    INT_32          index,          ///< Tile index
+    INT_32          macroModeIndex, ///< Index in macro tile mode table(CI)
     ADDR_TILEINFO*  pInfo,          ///< [out] Tile Info
     AddrTileMode*   pMode,          ///< [out] Tile mode
     AddrTileType*   pType           ///< [out] Tile type
@@ -3474,22 +3501,20 @@ VOID SiLib::HwlSelectTileMode(
 
 /**
 ****************************************************************************************************
-*   SiLib::HwlGetMaxAlignments
+*   SiLib::HwlComputeMaxBaseAlignments
 *
 *   @brief
 *       Gets maximum alignments
 *   @return
-*       ADDR_E_RETURNCODE
+*       maximum alignments
 ****************************************************************************************************
 */
-ADDR_E_RETURNCODE SiLib::HwlGetMaxAlignments(
-    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut    ///< [out] output structure
-    ) const
+UINT_32 SiLib::HwlComputeMaxBaseAlignments() const
 {
     const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info);
 
     // Initial size is 64 KiB for PRT.
-    UINT_64 maxBaseAlign = 64 * 1024;
+    UINT_32 maxBaseAlign = 64 * 1024;
 
     for (UINT_32 i = 0; i < m_noOfEntries; i++)
     {
@@ -3500,7 +3525,7 @@ ADDR_E_RETURNCODE SiLib::HwlGetMaxAlignments(
             UINT_32 tileSize = Min(m_tileTable[i].info.tileSplitBytes,
                                    MicroTilePixels * 8 * 16);
 
-            UINT_64 baseAlign = tileSize * pipes * m_tileTable[i].info.banks *
+            UINT_32 baseAlign = tileSize * pipes * m_tileTable[i].info.banks *
                                 m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight;
 
             if (baseAlign > maxBaseAlign)
@@ -3510,12 +3535,29 @@ ADDR_E_RETURNCODE SiLib::HwlGetMaxAlignments(
         }
     }
 
-    if (pOut != NULL)
+    return maxBaseAlign;
+}
+
+/**
+****************************************************************************************************
+*   SiLib::HwlComputeMaxMetaBaseAlignments
+*
+*   @brief
+*       Gets maximum alignments for metadata
+*   @return
+*       maximum alignments for metadata
+****************************************************************************************************
+*/
+UINT_32 SiLib::HwlComputeMaxMetaBaseAlignments() const
+{
+    UINT_32 maxPipe = 1;
+
+    for (UINT_32 i = 0; i < m_noOfEntries; i++)
     {
-        pOut->baseAlign = maxBaseAlign;
+        maxPipe = Max(maxPipe, HwlGetPipes(&m_tileTable[i].info));
     }
 
-    return ADDR_OK;
+    return m_pipeInterleaveBytes * maxPipe;
 }
 
 /**