radeonsi: lower IO intrinsics - complete rewrite of input/output scanning

[mesa.git] / src / amd / common / ac_binary.h

diff --git a/src/amd/common/ac_binary.h b/src/amd/common/ac_binary.h
index 53138f1181076df7e488e4ce00ece8927f9e4d41..0d981423696a061e37935e816d0e4f378e4cf94f 100644 (file)
--- a/src/amd/common/ac_binary.h
+++ b/src/amd/common/ac_binary.h
@@ -32,9 +32,12 @@
 extern "C" {
 #endif
 
+struct radeon_info;
+
 struct ac_shader_config {
        unsigned num_sgprs;
        unsigned num_vgprs;
+       unsigned num_shared_vgprs; /* GFX10: number of VGPRs shared between half-waves */
        unsigned spilled_sgprs;
        unsigned spilled_vgprs;
        unsigned lds_size; /* in HW allocation units; i.e 256 bytes on SI, 512 bytes on CI+ */
@@ -44,10 +47,13 @@ struct ac_shader_config {
        unsigned scratch_bytes_per_wave;
        unsigned rsrc1;
        unsigned rsrc2;
+       unsigned rsrc3;
 };
 
 void ac_parse_shader_binary_config(const char *data, size_t nbytes,
+                                  unsigned wave_size,
                                   bool really_needs_scratch,
+                                  const struct radeon_info *info,
                                   struct ac_shader_config *conf);
 
 #ifdef __cplusplus