meson: drop `intel_` prefix on imgui_core

[mesa.git] / src / amd / common / ac_gpu_info.c

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index b1225985234e2a303cdf6ab12b1d403ddcd56d8a..139cb51f95832b6ca831c33f7125c363a5e4e6de 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -321,24 +321,24 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 #define identify_chip(chipname) identify_chip2(chipname, chipname)
 
        switch (amdinfo->family_id) {
-       case AMDGPU_FAMILY_SI:
+       case FAMILY_SI:
                identify_chip(TAHITI);
                identify_chip(PITCAIRN);
                identify_chip2(CAPEVERDE, VERDE);
                identify_chip(OLAND);
                identify_chip(HAINAN);
                break;
-       case AMDGPU_FAMILY_CI:
+       case FAMILY_CI:
                identify_chip(BONAIRE);
                identify_chip(HAWAII);
                break;
-       case AMDGPU_FAMILY_KV:
+       case FAMILY_KV:
                identify_chip2(SPECTRE, KAVERI);
                identify_chip2(SPOOKY, KAVERI);
                identify_chip2(KALINDI, KABINI);
                identify_chip2(GODAVARI, KABINI);
                break;
-       case AMDGPU_FAMILY_VI:
+       case FAMILY_VI:
                identify_chip(ICELAND);
                identify_chip(TONGA);
                identify_chip(FIJI);
@@ -347,22 +347,22 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                identify_chip(POLARIS12);
                identify_chip(VEGAM);
                break;
-       case AMDGPU_FAMILY_CZ:
+       case FAMILY_CZ:
                identify_chip(CARRIZO);
                identify_chip(STONEY);
                break;
-       case AMDGPU_FAMILY_AI:
+       case FAMILY_AI:
                identify_chip(VEGA10);
                identify_chip(VEGA12);
                identify_chip(VEGA20);
                identify_chip(ARCTURUS);
                break;
-       case AMDGPU_FAMILY_RV:
+       case FAMILY_RV:
                identify_chip(RAVEN);
                identify_chip(RAVEN2);
                identify_chip(RENOIR);
                break;
-       case AMDGPU_FAMILY_NV:
+       case FAMILY_NV:
                identify_chip(NAVI10);
                identify_chip(NAVI12);
                identify_chip(NAVI14);
@@ -410,6 +410,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        else
                info->max_alloc_size = info->gart_size * 0.7;
 
+       /* Set which chips have uncached device memory. */
+       info->has_l2_uncached = info->chip_class >= GFX9;
+
        /* Set hardware information. */
        info->gds_size = gds.gds_total_size;
        info->gds_gfx_partition_size = gds.gds_gfx_partition_size;
@@ -470,9 +473,14 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        }
        if (info->chip_class >= GFX10) {
                info->tcc_cache_line_size = 128;
-               /* This is a hack, but it's all we can do without a kernel upgrade. */
-               info->tcc_harvested =
-                       (info->vram_size / info->num_tcc_blocks) != 512*1024*1024;
+
+               if (info->drm_minor >= 35) {
+                       info->tcc_harvested = device_info.tcc_disabled_mask != 0;
+               } else {
+                       /* This is a hack, but it's all we can do without a kernel upgrade. */
+                       info->tcc_harvested =
+                               (info->vram_size / info->num_tcc_blocks) != 512*1024*1024;
+               }
        } else {
                info->tcc_cache_line_size = 64;
        }
@@ -492,8 +500,15 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        assert(util_is_power_of_two_or_zero(compute.available_rings + 1));
 
        info->has_graphics = gfx.available_rings > 0;
-       info->num_sdma_rings = util_bitcount(dma.available_rings);
-       info->num_compute_rings = util_bitcount(compute.available_rings);
+       info->num_rings[RING_GFX] = util_bitcount(gfx.available_rings);
+       info->num_rings[RING_COMPUTE] = util_bitcount(compute.available_rings);
+       info->num_rings[RING_DMA] = util_bitcount(dma.available_rings);
+       info->num_rings[RING_UVD] = util_bitcount(uvd.available_rings);
+       info->num_rings[RING_VCE] = util_bitcount(vce.available_rings);
+       info->num_rings[RING_UVD_ENC] = util_bitcount(uvd_enc.available_rings);
+       info->num_rings[RING_VCN_DEC] = util_bitcount(vcn_dec.available_rings);
+       info->num_rings[RING_VCN_ENC] = util_bitcount(vcn_enc.available_rings);
+       info->num_rings[RING_VCN_JPEG] = util_bitcount(vcn_jpeg.available_rings);
 
        /* The mere presence of CLEAR_STATE in the IB causes random GPU hangs
         * on GFX6. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
@@ -618,6 +633,8 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                case CHIP_NAVI14:
                        pc_lines = 512;
                        break;
+               case CHIP_ARCTURUS:
+                       break;
                default:
                        assert(0);
                }
@@ -698,8 +715,15 @@ void ac_print_gpu_info(struct radeon_info *info)
 
        printf("Features:\n");
        printf("    has_graphics = %i\n", info->has_graphics);
-       printf("    num_compute_rings = %u\n", info->num_compute_rings);
-       printf("    num_sdma_rings = %i\n", info->num_sdma_rings);
+       printf("    num_rings[RING_GFX] = %i\n", info->num_rings[RING_GFX]);
+       printf("    num_rings[RING_DMA] = %i\n", info->num_rings[RING_DMA]);
+       printf("    num_rings[RING_COMPUTE] = %u\n", info->num_rings[RING_COMPUTE]);
+       printf("    num_rings[RING_UVD] = %i\n", info->num_rings[RING_UVD]);
+       printf("    num_rings[RING_VCE] = %i\n", info->num_rings[RING_VCE]);
+       printf("    num_rings[RING_UVD_ENC] = %i\n", info->num_rings[RING_UVD_ENC]);
+       printf("    num_rings[RING_VCN_DEC] = %i\n", info->num_rings[RING_VCN_DEC]);
+       printf("    num_rings[RING_VCN_ENC] = %i\n", info->num_rings[RING_VCN_ENC]);
+       printf("    num_rings[RING_VCN_JPEG] = %i\n", info->num_rings[RING_VCN_JPEG]);
        printf("    has_clear_state = %u\n", info->has_clear_state);
        printf("    has_distributed_tess = %u\n", info->has_distributed_tess);
        printf("    has_dcc_constant_encode = %u\n", info->has_dcc_constant_encode);