radeonsi: enable displayable DCC on Ravens

[mesa.git] / src / amd / common / ac_gpu_info.c

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index d890172227cbfbbdb31af40c33291b6809b5e205..c53335bbb7de65f829deafec580cb6155ff86965 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -458,6 +458,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
        assert(ib_align);
        info->ib_start_alignment = ib_align;
 
+       if (info->drm_minor >= 31 &&
+           (info->family == CHIP_RAVEN ||
+            info->family == CHIP_RAVEN2)) {
+               if (info->num_render_backends == 1)
+                       info->use_display_dcc_unaligned = true;
+               else
+                       info->use_display_dcc_with_retile_blit = true;
+       }
        return true;
 }