radv: Don't enable DCC / TC compat HTILE for storage images.

[mesa.git] / src / amd / common / ac_llvm_build.h

diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index f7906198277362637e10330d3eb68aa817f0e18c..6427d5315ae615695989ea5cc4ad50d551ba9f3c 100644 (file)
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -52,7 +52,10 @@ struct ac_llvm_context {
        LLVMTypeRef f16;
        LLVMTypeRef f32;
        LLVMTypeRef f64;
+       LLVMTypeRef v2i32;
+       LLVMTypeRef v3i32;
        LLVMTypeRef v4i32;
+       LLVMTypeRef v2f32;
        LLVMTypeRef v4f32;
        LLVMTypeRef v8i32;
 
@@ -71,13 +74,14 @@ struct ac_llvm_context {
        LLVMValueRef empty_md;
 
        enum chip_class chip_class;
+       enum radeon_family family;
 
        LLVMValueRef lds;
 };
 
 void
 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context,
-                    enum chip_class chip_class);
+                    enum chip_class chip_class, enum radeon_family family);
 
 unsigned ac_get_type_size(LLVMTypeRef type);
 
@@ -109,6 +113,10 @@ LLVMValueRef ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value);
 
 LLVMValueRef ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value);
 
+LLVMValueRef
+ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
+                              unsigned value_count, unsigned component);
+
 LLVMValueRef
 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
                                LLVMValueRef *values,
@@ -279,6 +287,8 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
                          LLVMValueRef offset, LLVMValueRef width,
                          bool is_signed);
 
+void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16);
+
 void ac_get_image_intr_name(const char *base_name,
                            LLVMTypeRef data_type,
                            LLVMTypeRef coords_type,