radv: add mipmaps support for DCC decompression on compute
[mesa.git] / src / amd / common / ac_llvm_build.h
index c3277fd2d13f400a7b63db7b042f5657477b5599..bbdb01184e6317c27c2642fd902e65ed6b8f7000 100644 (file)
@@ -26,7 +26,7 @@
 #define AC_LLVM_BUILD_H
 
 #include <stdbool.h>
-#include <llvm-c/TargetMachine.h>
+#include <llvm-c/Core.h>
 #include "compiler/nir/nir.h"
 #include "amd_family.h"
 
@@ -71,6 +71,7 @@ struct ac_llvm_context {
        LLVMTypeRef v3i32;
        LLVMTypeRef v4i32;
        LLVMTypeRef v2f32;
+       LLVMTypeRef v3f32;
        LLVMTypeRef v4f32;
        LLVMTypeRef v8i32;
 
@@ -153,6 +154,8 @@ void ac_build_optimization_barrier(struct ac_llvm_context *ctx,
 LLVMValueRef ac_build_shader_clock(struct ac_llvm_context *ctx);
 
 LLVMValueRef ac_build_ballot(struct ac_llvm_context *ctx, LLVMValueRef value);
+LLVMValueRef ac_get_i1_sgpr_mask(struct ac_llvm_context *ctx,
+                                LLVMValueRef value);
 
 LLVMValueRef ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value);
 
@@ -279,6 +282,7 @@ ac_build_buffer_store_format(struct ac_llvm_context *ctx,
                             LLVMValueRef voffset,
                             unsigned num_channels,
                             bool glc,
+                            bool slc,
                             bool writeonly_memory);
 
 LLVMValueRef
@@ -355,6 +359,36 @@ ac_build_raw_tbuffer_load(struct ac_llvm_context *ctx,
                          bool slc,
                          bool can_speculate);
 
+/* For ac_build_fetch_format.
+ *
+ * Note: FLOAT must be 0 (used for convenience of encoding in radeonsi).
+ */
+enum {
+       AC_FETCH_FORMAT_FLOAT = 0,
+       AC_FETCH_FORMAT_FIXED,
+       AC_FETCH_FORMAT_UNORM,
+       AC_FETCH_FORMAT_SNORM,
+       AC_FETCH_FORMAT_USCALED,
+       AC_FETCH_FORMAT_SSCALED,
+       AC_FETCH_FORMAT_UINT,
+       AC_FETCH_FORMAT_SINT,
+};
+
+LLVMValueRef
+ac_build_opencoded_load_format(struct ac_llvm_context *ctx,
+                              unsigned log_size,
+                              unsigned num_channels,
+                              unsigned format,
+                              bool reverse,
+                              bool known_aligned,
+                              LLVMValueRef rsrc,
+                              LLVMValueRef vindex,
+                              LLVMValueRef voffset,
+                              LLVMValueRef soffset,
+                              bool glc,
+                              bool slc,
+                              bool can_speculate);
+
 void
 ac_build_tbuffer_store_short(struct ac_llvm_context *ctx,
                             LLVMValueRef rsrc,
@@ -443,6 +477,7 @@ LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
 LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
                           LLVMValueRef b);
 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a, LLVMValueRef b);
+LLVMValueRef ac_build_umax(struct ac_llvm_context *ctx, LLVMValueRef a, LLVMValueRef b);
 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value);
 
 struct ac_export_args {
@@ -685,6 +720,20 @@ LLVMValueRef
 ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
                    unsigned bitsize);
 
+LLVMValueRef
+ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij);
+
+LLVMValueRef
+ac_build_load_helper_invocation(struct ac_llvm_context *ctx);
+
+LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op,
+                                LLVMValueRef ptr, LLVMValueRef val,
+                                const char *sync_scope);
+
+LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef ptr,
+                                     LLVMValueRef cmp, LLVMValueRef val,
+                                     const char *sync_scope);
+
 #ifdef __cplusplus
 }
 #endif