AC_TM_CHECK_IR = (1 << 5),
AC_TM_ENABLE_GLOBAL_ISEL = (1 << 6),
AC_TM_CREATE_LOW_OPT = (1 << 7),
+ AC_TM_NO_LOAD_STORE_OPT = (1 << 8),
};
enum ac_float_mode {
void
ac_llvm_add_target_dep_function_attr(LLVMValueRef F,
const char *name, unsigned value);
+void ac_llvm_set_workgroup_size(LLVMValueRef F, unsigned size);
static inline unsigned
ac_get_load_intr_attribs(bool can_speculate)
AC_FUNC_ATTR_READONLY;
}
-static inline unsigned
-ac_get_store_intr_attribs(bool writeonly_memory)
-{
- return writeonly_memory ? AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
- AC_FUNC_ATTR_WRITEONLY;
-}
-
unsigned
ac_count_scratch_private_memory(LLVMValueRef function);
struct ac_compiler_passes *ac_create_llvm_passes(LLVMTargetMachineRef tm);
void ac_destroy_llvm_passes(struct ac_compiler_passes *p);
-bool ac_compile_module_to_binary(struct ac_compiler_passes *p, LLVMModuleRef module,
- struct ac_shader_binary *binary);
+bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module,
+ char **pelf_buffer, size_t *pelf_size);
void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr);
void ac_enable_global_isel(LLVMTargetMachineRef tm);
+static inline bool
+ac_has_vec3_support(enum chip_class chip, bool use_format)
+{
+ if (chip == GFX6 && !use_format) {
+ /* GFX6 only supports vec3 with load/store format. */
+ return false;
+ }
+
+ return HAVE_LLVM >= 0x900;
+}
+
#ifdef __cplusplus
}
#endif