ac/nir: fix translation of nir_op_frcp for doubles

[mesa.git] / src / amd / common / ac_nir_to_llvm.c

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 5885c70ef8956db133b03730d3ec6b8475c9e889..7b348d97f0a086346e393be605c91f8fb2dd1589 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1715,7 +1715,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
                break;
        case nir_op_frcp:
                src[0] = ac_to_float(&ctx->ac, src[0]);
-               result = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, src[0]);
+               result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
+                                      src[0]);
                break;
        case nir_op_iand:
                result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
@@ -1842,7 +1843,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
        case nir_op_frsq:
                result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
                                              ac_to_float_type(&ctx->ac, def_type), src[0]);
-               result = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, result);
+               result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
+                                      result);
                break;
        case nir_op_fpow:
                result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
@@ -4166,6 +4168,13 @@ load_tess_coord(struct ac_shader_abi *abi, LLVMTypeRef type,
        return LLVMBuildBitCast(ctx->builder, result, type, "");
 }
 
+static LLVMValueRef
+load_patch_vertices_in(struct ac_shader_abi *abi)
+{
+       struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+       return LLVMConstInt(ctx->ac.i32, ctx->options->key.tcs.input_vertices, false);
+}
+
 static void visit_intrinsic(struct ac_nir_context *ctx,
                             nir_intrinsic_instr *instr)
 {
@@ -4366,7 +4375,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
                break;
        case nir_intrinsic_load_patch_vertices_in:
-               result = LLVMConstInt(ctx->ac.i32, ctx->nctx->options->key.tcs.input_vertices, false);
+               result = ctx->abi->load_patch_vertices_in(ctx->abi);
                break;
        default:
                fprintf(stderr, "Unknown intrinsic: ");
@@ -5556,6 +5565,7 @@ setup_locals(struct ac_nir_context *ctx,
        nir_foreach_variable(variable, &func->impl->locals) {
                unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
                variable->data.driver_location = ctx->num_locals * 4;
+               variable->data.location_frac = 0;
                ctx->num_locals += attrib_count;
        }
        ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
@@ -6697,11 +6707,13 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                        ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
                        ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;
                        ctx.abi.load_tess_inputs = load_tcs_input;
+                       ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
                        ctx.abi.store_tcs_outputs = store_tcs_output;
                } else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
                        ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
                        ctx.abi.load_tess_inputs = load_tes_input;
                        ctx.abi.load_tess_coord = load_tess_coord;
+                       ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
                } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
                        if (shader_info->info.vs.needs_instance_id) {
                                if (ctx.ac.chip_class == GFX9 &&