ac/nir: fix translation of nir_op_frcp for doubles

[mesa.git] / src / amd / common / ac_nir_to_llvm.c

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 70876cfc69aecbc969f9bdb424f48473c7deda34..7b348d97f0a086346e393be605c91f8fb2dd1589 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -597,10 +597,12 @@ static void allocate_user_sgprs(struct nir_to_llvm_context *ctx,
                break;
        }
 
-       if (ctx->shader_info->info.needs_push_constants)
+       if (ctx->shader_info->info.loads_push_constants)
                user_sgpr_info->sgpr_count += 2;
 
-       uint32_t remaining_sgprs = 16 - user_sgpr_info->sgpr_count;
+       uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16;
+       uint32_t remaining_sgprs = available_sgprs - user_sgpr_info->sgpr_count;
+
        if (remaining_sgprs / 2 < util_bitcount(ctx->shader_info->info.desc_set_used_mask)) {
                user_sgpr_info->sgpr_count += 2;
                user_sgpr_info->indirect_all_descriptor_sets = true;
@@ -638,7 +640,7 @@ declare_global_input_sgprs(struct nir_to_llvm_context *ctx,
                add_array_arg(args, const_array(type, 32), desc_sets);
        }
 
-       if (ctx->shader_info->info.needs_push_constants) {
+       if (ctx->shader_info->info.loads_push_constants) {
                /* 1 for push constants and dynamic descriptors */
                add_array_arg(args, type, &ctx->push_constants);
        }
@@ -729,7 +731,7 @@ set_global_input_locs(struct nir_to_llvm_context *ctx, gl_shader_stage stage,
                ctx->shader_info->need_indirect_descriptor_sets = true;
        }
 
-       if (ctx->shader_info->info.needs_push_constants) {
+       if (ctx->shader_info->info.loads_push_constants) {
                set_loc_shader(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx, 2);
        }
 }
@@ -1713,7 +1715,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
                break;
        case nir_op_frcp:
                src[0] = ac_to_float(&ctx->ac, src[0]);
-               result = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, src[0]);
+               result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
+                                      src[0]);
                break;
        case nir_op_iand:
                result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
@@ -1840,7 +1843,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
        case nir_op_frsq:
                result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
                                              ac_to_float_type(&ctx->ac, def_type), src[0]);
-               result = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, result);
+               result = ac_build_fdiv(&ctx->ac, instr->dest.dest.ssa.bit_size == 32 ? ctx->ac.f32_1 : ctx->ac.f64_1,
+                                      result);
                break;
        case nir_op_fpow:
                result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
@@ -2578,7 +2582,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
                                           const nir_intrinsic_instr *instr)
 {
-       LLVMValueRef results[8], ret;
+       LLVMValueRef ret;
        LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
        LLVMValueRef offset = get_src(ctx, instr->src[1]);
        int num_components = instr->num_components;
@@ -2589,20 +2593,9 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
        if (instr->dest.ssa.bit_size == 64)
                num_components *= 2;
 
-       for (unsigned i = 0; i < num_components; ++i) {
-               LLVMValueRef params[] = {
-                       rsrc,
-                       LLVMBuildAdd(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, 4 * i, 0),
-                                    offset, "")
-               };
-               results[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.load.const.v4i32", ctx->ac.f32,
-                                               params, 2,
-                                               AC_FUNC_ATTR_READNONE |
-                                               AC_FUNC_ATTR_LEGACY);
-       }
-
+       ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
+                                  NULL, 0, false, false, true, true);
 
-       ret = ac_build_gather_values(&ctx->ac, results, num_components);
        return LLVMBuildBitCast(ctx->ac.builder, ret,
                                get_def_type(ctx, &instr->dest.ssa), "");
 }
@@ -4175,6 +4168,13 @@ load_tess_coord(struct ac_shader_abi *abi, LLVMTypeRef type,
        return LLVMBuildBitCast(ctx->builder, result, type, "");
 }
 
+static LLVMValueRef
+load_patch_vertices_in(struct ac_shader_abi *abi)
+{
+       struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+       return LLVMConstInt(ctx->ac.i32, ctx->options->key.tcs.input_vertices, false);
+}
+
 static void visit_intrinsic(struct ac_nir_context *ctx,
                             nir_intrinsic_instr *instr)
 {
@@ -4375,7 +4375,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
                break;
        case nir_intrinsic_load_patch_vertices_in:
-               result = LLVMConstInt(ctx->ac.i32, ctx->nctx->options->key.tcs.input_vertices, false);
+               result = ctx->abi->load_patch_vertices_in(ctx->abi);
                break;
        default:
                fprintf(stderr, "Unknown intrinsic: ");
@@ -5565,6 +5565,7 @@ setup_locals(struct ac_nir_context *ctx,
        nir_foreach_variable(variable, &func->impl->locals) {
                unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
                variable->data.driver_location = ctx->num_locals * 4;
+               variable->data.location_frac = 0;
                ctx->num_locals += attrib_count;
        }
        ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
@@ -6706,11 +6707,13 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                        ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
                        ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;
                        ctx.abi.load_tess_inputs = load_tcs_input;
+                       ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
                        ctx.abi.store_tcs_outputs = store_tcs_output;
                } else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
                        ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
                        ctx.abi.load_tess_inputs = load_tes_input;
                        ctx.abi.load_tess_coord = load_tess_coord;
+                       ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
                } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
                        if (shader_info->info.vs.needs_instance_id) {
                                if (ctx.ac.chip_class == GFX9 &&
@@ -6984,6 +6987,14 @@ void ac_compile_nir_shader(LLVMTargetMachineRef tm,
        ac_compile_llvm_module(tm, llvm_module, binary, config, shader_info, nir[0]->info.stage, dump_shader, options->supports_spill);
        for (int i = 0; i < nir_count; ++i)
                ac_fill_shader_info(shader_info, nir[i], options);
+
+       /* Determine the ES type (VS or TES) for the GS on GFX9. */
+       if (options->chip_class == GFX9) {
+               if (nir_count == 2 &&
+                   nir[1]->info.stage == MESA_SHADER_GEOMETRY) {
+                       shader_info->gs.es_type = nir[0]->info.stage;
+               }
+       }
 }
 
 static void