ac: add basic nir -> llvm type helper

[mesa.git] / src / amd / common / ac_nir_to_llvm.c

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 1ecdeca063c3fb9883c7bf3cf11c9a430062079d..8610e3671580fd939f575d31dd09b9d121492e91 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -149,6 +149,9 @@ struct nir_to_llvm_context {
        unsigned tes_primitive_mode;
        uint64_t tess_outputs_written;
        uint64_t tess_patch_outputs_written;
+
+       uint32_t tcs_patch_outputs_read;
+       uint64_t tcs_outputs_read;
 };
 
 static inline struct nir_to_llvm_context *
@@ -158,6 +161,28 @@ nir_to_llvm_context_from_abi(struct ac_shader_abi *abi)
        return container_of(abi, ctx, abi);
 }
 
+static LLVMTypeRef
+nir2llvmtype(struct ac_nir_context *ctx,
+            const struct glsl_type *type)
+{
+       switch (glsl_get_base_type(glsl_without_array(type))) {
+       case GLSL_TYPE_UINT:
+       case GLSL_TYPE_INT:
+               return ctx->ac.i32;
+       case GLSL_TYPE_UINT64:
+       case GLSL_TYPE_INT64:
+               return ctx->ac.i64;
+       case GLSL_TYPE_DOUBLE:
+               return ctx->ac.f64;
+       case GLSL_TYPE_FLOAT:
+               return ctx->ac.f32;
+       default:
+               assert(!"Unsupported type in nir2llvmtype()");
+               break;
+       }
+       return 0;
+}
+
 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
                                     const nir_deref_var *deref,
                                     enum ac_descriptor_type desc_type,
@@ -2789,7 +2814,15 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
        const unsigned comp = instr->variables[0]->var->data.location_frac;
        const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var, ctx->stage);
        const bool is_compact = instr->variables[0]->var->data.compact;
+       bool store_lds = true;
 
+       if (instr->variables[0]->var->data.patch) {
+               if (!(ctx->tcs_patch_outputs_read & (1U << instr->variables[0]->var->data.location)))
+                       store_lds = false;
+       } else {
+               if (!(ctx->tcs_outputs_read & (1ULL << instr->variables[0]->var->data.location)))
+                       store_lds = false;
+       }
        get_deref_offset(ctx->nir, instr->variables[0],
                         false, NULL, per_vertex ? &vertex_index : NULL,
                         &const_index, &indir_index);
@@ -2826,7 +2859,8 @@ store_tcs_output(struct nir_to_llvm_context *ctx,
                        continue;
                LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan - comp);
 
-               ac_lds_store(&ctx->ac, dw_addr, value);
+               if (store_lds || is_tess_factor)
+                       ac_lds_store(&ctx->ac, dw_addr, value);
 
                if (!is_tess_factor && writemask != 0xF)
                        ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, value, 1,
@@ -6550,6 +6584,9 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                        ctx.gs_next_vertex = ac_build_alloca(&ctx.ac, ctx.ac.i32, "gs_next_vertex");
 
                        ctx.gs_max_out_vertices = shaders[i]->info.gs.vertices_out;
+               } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
+                       ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
+                       ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;
                } else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
                        ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
                } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {