ac/nir: extract shader_info->fs.can_discard from NIR shader info

[mesa.git] / src / amd / common / ac_nir_to_llvm.c

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ad6881000a8354cea1e5852bf61569c76ae504f0..ecddb5e9b9b10923e4223db8c0df6b5f72f74605 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3431,9 +3431,6 @@ static void visit_image_store(struct ac_nir_context *ctx,
        if (force_glc)
                glc = i1true;
 
-       if (ctx->stage == MESA_SHADER_FRAGMENT)
-               ctx->nctx->shader_info->fs.writes_memory = true;
-
        if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) {
                params[0] = to_float(&ctx->ac, get_src(ctx, instr->src[2])); /* data */
                params[1] = get_sampler_desc(ctx, instr->variables[0], AC_DESC_BUFFER, true, true);
@@ -3493,9 +3490,6 @@ static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
        LLVMValueRef i1true = LLVMConstInt(ctx->ac.i1, 1, false);
        MAYBE_UNUSED int length;
 
-       if (ctx->stage == MESA_SHADER_FRAGMENT)
-               ctx->nctx->shader_info->fs.writes_memory = true;
-
        switch (instr->intrinsic) {
        case nir_intrinsic_image_atomic_add:
                atomic_name = "add";
@@ -3633,7 +3627,6 @@ static void emit_discard_if(struct nir_to_llvm_context *ctx,
                            const nir_intrinsic_instr *instr)
 {
        LLVMValueRef cond;
-       ctx->shader_info->fs.can_discard = true;
 
        cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
                             get_src(ctx->nir, instr->src[0]),
@@ -4029,8 +4022,6 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                break;
        case nir_intrinsic_load_instance_id:
                result = ctx->abi->instance_id;
-               ctx->nctx->shader_info->vs.vgpr_comp_cnt = MAX2(3,
-                                           ctx->nctx->shader_info->vs.vgpr_comp_cnt);
                break;
        case nir_intrinsic_load_num_work_groups:
                result = ctx->nctx->num_work_groups;
@@ -4094,7 +4085,6 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                result = visit_image_size(ctx, instr);
                break;
        case nir_intrinsic_discard:
-               ctx->nctx->shader_info->fs.can_discard = true;
                ac_build_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp",
                                   LLVMVoidTypeInContext(ctx->ac.context),
                                   NULL, 0, AC_FUNC_ATTR_LEGACY);
@@ -4168,6 +4158,9 @@ static LLVMValueRef radv_get_sampler_desc(struct ac_shader_abi *abi,
 
        assert(base_index < layout->binding_count);
 
+       if (write && ctx->stage == MESA_SHADER_FRAGMENT)
+               ctx->shader_info->fs.writes_memory = true;
+
        switch (desc_type) {
        case AC_DESC_IMAGE:
                type = ctx->v8i32;
@@ -4629,7 +4622,9 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
 
        if (instr->op == nir_texop_query_levels)
                result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
-       else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod && instr->op != nir_texop_tg4)
+       else if (instr->is_shadow && instr->is_new_style_shadow &&
+                instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
+                instr->op != nir_texop_tg4)
                result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
        else if (instr->op == nir_texop_txs &&
                 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
@@ -6203,7 +6198,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
        memset(shader_info, 0, sizeof(*shader_info));
 
        ac_nir_shader_info_pass(nir, options, &shader_info->info);
-               
+
        LLVMSetTarget(ctx.module, options->supports_spill ? "amdgcn-mesa-mesa3d" : "amdgcn--");
 
        LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm);
@@ -6232,6 +6227,13 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                ctx.gs_max_out_vertices = nir->info.gs.vertices_out;
        } else if (nir->stage == MESA_SHADER_TESS_EVAL) {
                ctx.tes_primitive_mode = nir->info.tess.primitive_mode;
+       } else if (nir->stage == MESA_SHADER_VERTEX) {
+               if (shader_info->info.vs.needs_instance_id) {
+                       ctx.shader_info->vs.vgpr_comp_cnt =
+                               MAX2(3, ctx.shader_info->vs.vgpr_comp_cnt);
+               }
+       } else if (nir->stage == MESA_SHADER_FRAGMENT) {
+               shader_info->fs.can_discard = nir->info.fs.uses_discard;
        }
 
        ac_setup_rings(&ctx);