ac/nir: make handle_shader_output_decl() non-static

[mesa.git] / src / amd / common / ac_nir_to_llvm.h

diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 1737866166ea7e0d23a5000afc0132f08553ca10..7b64ad54fc536071a509a19b99be43810611108c 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -34,6 +34,7 @@
 struct ac_shader_binary;
 struct ac_shader_config;
 struct nir_shader;
+struct nir_variable;
 struct radv_pipeline_layout;
 
 struct ac_llvm_context;
@@ -60,6 +61,8 @@ struct ac_tcs_variant_key {
 
 struct ac_fs_variant_key {
        uint32_t col_format;
+       uint8_t log2_ps_iter_samples;
+       uint8_t log2_num_samples;
        uint32_t is_int8;
        uint32_t is_int10;
        uint32_t multisample : 1;
@@ -81,6 +84,7 @@ struct ac_nir_compiler_options {
        bool unsafe_math;
        bool supports_spill;
        bool clamp_shadow_reference;
+       bool dump_preoptir;
        enum radeon_family family;
        enum chip_class chip_class;
 };
@@ -115,6 +119,11 @@ enum ac_ud_index {
        AC_UD_MAX_UD = AC_UD_TCS_MAX_UD,
 };
 
+/* Interpolation locations */
+#define INTERP_CENTER 0
+#define INTERP_CENTROID 1
+#define INTERP_SAMPLE 2
+
 /* descriptor index into scratch ring offsets */
 #define RING_SCRATCH 0
 #define RING_ESGS_VS 1
@@ -142,7 +151,6 @@ struct ac_vs_output_info {
        bool writes_layer;
        bool writes_viewport_index;
        bool export_prim_id;
-       uint32_t export_mask;
        unsigned pos_exports;
 };
 
@@ -156,6 +164,7 @@ struct ac_shader_variant_info {
        unsigned num_user_sgprs;
        unsigned num_input_sgprs;
        unsigned num_input_vgprs;
+       unsigned private_mem_vgprs;
        bool need_indirect_descriptor_sets;
        struct {
                struct {
@@ -170,15 +179,8 @@ struct ac_shader_variant_info {
                        unsigned num_interp;
                        uint32_t input_mask;
                        uint32_t flat_shaded_mask;
-                       bool has_pcoord;
                        bool can_discard;
-                       bool writes_z;
-                       bool writes_stencil;
-                       bool writes_sample_mask;
                        bool early_fragment_test;
-                       bool writes_memory;
-                       bool prim_id_input;
-                       bool layer_input;
                } fs;
                struct {
                        unsigned block_size[3];
@@ -229,8 +231,18 @@ void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
                              const struct ac_nir_compiler_options *options,
                              bool dump_shader);
 
-struct nir_to_llvm_context;
+void ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class);
+
 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
-                     struct nir_shader *nir, struct nir_to_llvm_context *nctx);
+                     struct nir_shader *nir);
+
+void
+ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
+                            struct ac_shader_abi *abi,
+                            struct nir_shader *nir,
+                            struct nir_variable *variable,
+                            gl_shader_stage stage);
+
+bool ac_lower_subgroups(struct nir_shader *shader);
 
 #endif /* AC_NIR_TO_LLVM_H */